[MIPS] Register PCI host bridge resource earlier

PCI based SNI RM machines have their EISA bus behind an Intel PCI/EISA
bridge. So the PCI IO range must start at 0x0000. Changing that will
break the PCI bus, because i8259.c already has registered it's IO
addresses before the PCI bus gets initialized. Below is a patch,
which will register the PCI host bridge resources inside
register_pci_controller(). It also changes i8259.c to use insert_region(),
because request_resource() will fail, if the IO space of the PIT hanging
of the PCI host bridge (maybe passing the resource parent to
init_i8259_irqs() is a cleaner fix for that).

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index 9c79703979b2b128da7b2040e508515d662e43d4..2345160e63fc895ca05262aa92f1480e3cdb3490 100644 (file)
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -328,8 +328,8 @@ void __init init_i8259_irqs (void)
 {
        int i;
 
-       request_resource(&ioport_resource, &pic1_io_resource);
-       request_resource(&ioport_resource, &pic2_io_resource);
+       insert_resource(&ioport_resource, &pic1_io_resource);
+       insert_resource(&ioport_resource, &pic2_io_resource);
 
        init_8259A(0);
 

diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index de7cfc559ddbdc56980711374577b8a001f5469e..8108231f2e20909ed0057a792a4f3265827fac8f 100644 (file)
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -77,6 +77,13 @@ pcibios_align_resource(void *data, struct resource *res,
 
 void __init register_pci_controller(struct pci_controller *hose)
 {
+       if (request_resource(&iomem_resource, hose->mem_resource) < 0)
+               goto out;
+       if (request_resource(&ioport_resource, hose->io_resource) < 0) {
+               release_resource(hose->mem_resource);
+               goto out;
+       }
+
        *hose_tail = hose;
        hose_tail = &hose->next;
 
@@ -87,6 +94,11 @@ void __init register_pci_controller(struct pci_controller *hose)
                printk(KERN_WARNING
                       "registering PCI controller with io_map_base unset\n");
        }
+       return;
+
+out:
+       printk(KERN_WARNING
+              "Skipping PCI bus scan due to resource conflict\n");
 }
 
 /* Most MIPS systems have straight-forward swizzling needs.  */
@@ -121,11 +133,6 @@ static int __init pcibios_init(void)
        /* Scan all of the recorded PCI controllers.  */
        for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
 
-               if (request_resource(&iomem_resource, hose->mem_resource) < 0)
-                       goto out;
-               if (request_resource(&ioport_resource, hose->io_resource) < 0)
-                       goto out_free_mem_resource;
-
                if (!hose->iommu)
                        PCI_DMA_BUS_IS_PHYS = 1;
 
@@ -144,14 +151,6 @@ static int __init pcibios_init(void)
                                need_domain_info = 1;
                        }
                }
-               continue;
-
-out_free_mem_resource:
-               release_resource(hose->mem_resource);
-
-out:
-               printk(KERN_WARNING
-                      "Skipping PCI bus scan due to resource conflict\n");
        }
 
        if (!pci_probe_only)