MIPS: JZ4740: register an irq_domain for the interrupt controller

When probing the interrupt controller, register an IRQ domain such
that the interrupts can be translated by devicetree code & thus used
from devicetree.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: Brian Norris <computersforpeace@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/10140/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/jz4740/irq.c b/arch/mips/jz4740/irq.c
index ed5191569b95dd972cc9e4f5dd2fa1c8a2e80eaa..ddcf78a24e5b2be0db4efe26083deead7a633f64 100644 (file)
--- a/arch/mips/jz4740/irq.c
+++ b/arch/mips/jz4740/irq.c
@@ -85,6 +85,7 @@ static int __init jz4740_intc_of_init(struct device_node *node,
 {
        struct irq_chip_generic *gc;
        struct irq_chip_type *ct;
+       struct irq_domain *domain;
        int parent_irq;
 
        parent_irq = irq_of_parse_and_map(node, 0);
@@ -113,6 +114,11 @@ static int __init jz4740_intc_of_init(struct device_node *node,
 
        irq_setup_generic_chip(gc, IRQ_MSK(32), 0, 0, IRQ_NOPROBE | IRQ_LEVEL);
 
+       domain = irq_domain_add_legacy(node, num_chips * 32, JZ4740_IRQ_BASE, 0,
+                                      &irq_domain_simple_ops, NULL);
+       if (!domain)
+               pr_warn("unable to register IRQ domain\n");
+
        setup_irq(parent_irq, &jz4740_cascade_action);
        return 0;
 }