mmc: sunxi: Check the value returned by clk_round_rate
authorJean-Francois Moine <moinejf@free.fr>
Tue, 23 Aug 2016 08:51:04 +0000 (10:51 +0200)
committerUlf Hansson <ulf.hansson@linaro.org>
Mon, 26 Sep 2016 19:31:12 +0000 (21:31 +0200)
clk_round_rate() may return an error. Check it.

Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sunxi-mmc.c

index 2ec91ce1fb0a5a8181aa33d4a69c41edb99a0150..142ab3ff579ce3c167c610128d4a3ece7b1d261a 100644 (file)
@@ -692,7 +692,8 @@ static int sunxi_mmc_clk_set_phase(struct sunxi_mmc_host *host,
 static int sunxi_mmc_clk_set_rate(struct sunxi_mmc_host *host,
                                  struct mmc_ios *ios)
 {
-       u32 rate, rval, clock = ios->clock;
+       long rate;
+       u32 rval, clock = ios->clock;
        int ret;
 
        /* 8 bit DDR requires a higher module clock */
@@ -701,13 +702,18 @@ static int sunxi_mmc_clk_set_rate(struct sunxi_mmc_host *host,
                clock <<= 1;
 
        rate = clk_round_rate(host->clk_mmc, clock);
-       dev_dbg(mmc_dev(host->mmc), "setting clk to %d, rounded %d\n",
+       if (rate < 0) {
+               dev_err(mmc_dev(host->mmc), "error rounding clk to %d: %ld\n",
+                       clock, rate);
+               return rate;
+       }
+       dev_dbg(mmc_dev(host->mmc), "setting clk to %d, rounded %ld\n",
                clock, rate);
 
        /* setting clock rate */
        ret = clk_set_rate(host->clk_mmc, rate);
        if (ret) {
-               dev_err(mmc_dev(host->mmc), "error setting clk to %d: %d\n",
+               dev_err(mmc_dev(host->mmc), "error setting clk to %ld: %d\n",
                        rate, ret);
                return ret;
        }