drm/i915: Pass dev_priv to intel_init_pm()
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 31 Oct 2016 20:37:25 +0000 (22:37 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 1 Nov 2016 14:40:38 +0000 (16:40 +0200)
Unify our approach to things by passing around dev_priv instead of dev.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1477946245-14134-27-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_pm.c

index a46922aec99bd631158b994ff36e56ca742aa383..97589102442cf680053061e43ae20efa34d75523 100644 (file)
@@ -16419,7 +16419,7 @@ int intel_modeset_init(struct drm_device *dev)
 
        intel_init_quirks(dev);
 
-       intel_init_pm(dev);
+       intel_init_pm(dev_priv);
 
        if (INTEL_INFO(dev)->num_pipes == 0)
                return 0;
index 8765f8d5366cf0eb41569ee13ecc7dca28703ccf..398195bf6dd16643e7fbb1e2b53562fc043053cf 100644 (file)
@@ -1707,7 +1707,7 @@ void intel_init_clock_gating(struct drm_i915_private *dev_priv);
 void intel_suspend_hw(struct drm_i915_private *dev_priv);
 int ilk_wm_max_level(const struct drm_i915_private *dev_priv);
 void intel_update_watermarks(struct intel_crtc *crtc);
-void intel_init_pm(struct drm_device *dev);
+void intel_init_pm(struct drm_i915_private *dev_priv);
 void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv);
 void intel_pm_setup(struct drm_device *dev);
 void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
index d2320b19034ea3b7ffe4764113d76d3506cbbd16..cc9e0c0f445f03a5d6373d2d68cf19ef7e11df8d 100644 (file)
@@ -7677,10 +7677,8 @@ void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv)
 }
 
 /* Set up chip specific power management-related functions */
-void intel_init_pm(struct drm_device *dev)
+void intel_init_pm(struct drm_i915_private *dev_priv)
 {
-       struct drm_i915_private *dev_priv = to_i915(dev);
-
        intel_fbc_init(dev_priv);
 
        /* For cxsr */
@@ -7690,7 +7688,7 @@ void intel_init_pm(struct drm_device *dev)
                i915_ironlake_get_mem_freq(dev_priv);
 
        /* For FIFO watermark updates */
-       if (INTEL_INFO(dev)->gen >= 9) {
+       if (INTEL_GEN(dev_priv) >= 9) {
                skl_setup_wm_latency(dev_priv);
                dev_priv->display.update_wm = skl_update_wm;
                dev_priv->display.compute_global_watermarks = skl_compute_wm;
@@ -7741,7 +7739,7 @@ void intel_init_pm(struct drm_device *dev)
                dev_priv->display.update_wm = i9xx_update_wm;
                dev_priv->display.get_fifo_size = i9xx_get_fifo_size;
        } else if (IS_GEN2(dev_priv)) {
-               if (INTEL_INFO(dev)->num_pipes == 1) {
+               if (INTEL_INFO(dev_priv)->num_pipes == 1) {
                        dev_priv->display.update_wm = i845_update_wm;
                        dev_priv->display.get_fifo_size = i845_get_fifo_size;
                } else {