ARM: dts: rockchip: Add timer entries to rk3188 SoC
authorAlexander Kochetkov <al.kochet@gmail.com>
Tue, 31 Jan 2017 12:43:15 +0000 (15:43 +0300)
committerDaniel Lezcano <daniel.lezcano@linaro.org>
Fri, 7 Apr 2017 14:23:06 +0000 (16:23 +0200)
The patch add two timers to all rk3188 based boards.

The first timer is from alive subsystem and it act as a backup
for the local timers at sleep time. It act the same as other
SoC rockchip timers already present in kernel.

The second timer is from CPU subsystem and act as replacement
for the arm-global-timer clocksource and sched clock. It run
at stable frequency 24MHz.

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
arch/arm/boot/dts/rk3188.dtsi

index cf91254d0a432aa39e73b16b0339a772a35277f5..8428faeb9c60ec8e1e58e751e0ff0e4404bfe07c 100644 (file)
                };
        };
 
+       timer3: timer@2000e000 {
+               compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer";
+               reg = <0x2000e000 0x20>;
+               interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru SCLK_TIMER3>, <&cru PCLK_TIMER3>;
+               clock-names = "timer", "pclk";
+       };
+
+       timer6: timer@200380a0 {
+               compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer";
+               reg = <0x200380a0 0x20>;
+               interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru SCLK_TIMER6>, <&cru PCLK_TIMER0>;
+               clock-names = "timer", "pclk";
+       };
+
        i2s0: i2s@1011a000 {
                compatible = "rockchip,rk3188-i2s", "rockchip,rk3066-i2s";
                reg = <0x1011a000 0x2000>;