int response_busy;
int context_loss;
int dpm_state;
+ int vdd;
struct omap_mmc_platform_data *pdata;
};
case MMC_POWER_OFF:
mmc_slot(host).set_power(host->dev, host->slot_id,
0, 0);
+ host->vdd = 0;
break;
case MMC_POWER_UP:
mmc_slot(host).set_power(host->dev, host->slot_id,
1, ios->vdd);
+ host->vdd = ios->vdd;
break;
case MMC_POWER_ON:
do_send_init_stream = 1;
/*
* Dynamic power saving handling, FSM:
- * ENABLED -> DISABLED -> OFF
+ * ENABLED -> DISABLED -> OFF / REGSLEEP
* ^___________| |
* |______________________|
*
* ENABLED: mmc host is fully functional
* DISABLED: fclk is off
* OFF: fclk is off,voltage regulator is off
+ * REGSLEEP: fclk is off,voltage regulator is asleep
*
* Transition handlers return the timeout for the next state transition
* or negative error.
*/
-enum {ENABLED = 0, DISABLED, OFF};
+enum {ENABLED = 0, DISABLED, REGSLEEP, OFF};
/* Handler for [ENABLED -> DISABLED] transition */
static int omap_mmc_enabled_to_disabled(struct mmc_omap_host *host)
mmc_slot(host).get_cover_state(host->dev, host->slot_id))) {
mmc_power_save_host(host->mmc);
new_state = OFF;
- } else
- new_state = DISABLED;
+ } else {
+ if (mmc_slot(host).set_sleep)
+ mmc_slot(host).set_sleep(host->dev, host->slot_id,
+ 1, 0, 0);
+ new_state = REGSLEEP;
+ }
OMAP_HSMMC_WRITE(host->base, ISE, 0);
OMAP_HSMMC_WRITE(host->base, IE, 0);
return 0;
}
+/* Handler for [REGSLEEP -> ENABLED] transition */
+static int omap_mmc_regsleep_to_enabled(struct mmc_omap_host *host)
+{
+ unsigned long timeout;
+
+ dev_dbg(mmc_dev(host->mmc), "REGSLEEP -> ENABLED\n");
+
+ clk_enable(host->fclk);
+ clk_enable(host->iclk);
+
+ if (clk_enable(host->dbclk))
+ dev_dbg(mmc_dev(host->mmc),
+ "Enabling debounce clk failed\n");
+
+ omap_mmc_restore_ctx(host);
+
+ /*
+ * We turned off interrupts and bus power. Interrupts
+ * are turned on by 'mmc_omap_start_command()' so we
+ * just need to turn on the bus power here.
+ */
+ OMAP_HSMMC_WRITE(host->base, HCTL,
+ OMAP_HSMMC_READ(host->base, HCTL) | SDBP);
+
+ timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS);
+ while ((OMAP_HSMMC_READ(host->base, HCTL) & SDBP) != SDBP &&
+ time_before(jiffies, timeout))
+ ;
+
+ if (mmc_slot(host).set_sleep)
+ mmc_slot(host).set_sleep(host->dev, host->slot_id,
+ 0, host->vdd, 0);
+
+ host->dpm_state = ENABLED;
+
+ return 0;
+}
+
/*
* Bring MMC host to ENABLED from any other PM state.
*/
switch (host->dpm_state) {
case DISABLED:
return omap_mmc_disabled_to_enabled(host);
+ case REGSLEEP:
+ return omap_mmc_regsleep_to_enabled(host);
case OFF:
return omap_mmc_off_to_enabled(host);
default:
host->dpm_state, mmc->nesting_cnt,
host->context_loss, context_loss);
- if (host->suspended || host->dpm_state == OFF) {
+ if (host->suspended || host->dpm_state == OFF ||
+ host->dpm_state == REGSLEEP) {
seq_printf(s, "host suspended, can't read registers\n");
return 0;
}