ath9k: enable hw manual peak calibration for QCA9561
authorMiaoqing Pan <miaoqing@qca.qualcomm.com>
Tue, 1 Sep 2015 02:56:09 +0000 (10:56 +0800)
committerKalle Valo <kvalo@codeaurora.org>
Tue, 29 Sep 2015 07:34:09 +0000 (10:34 +0300)
This patch fix https://lists.openwrt.org/pipermail/openwrt-devel/
2015-August/034979.html. As the peak detect calibration is set
incorrectly.

Signed-off-by: Miaoqing Pan <miaoqing@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
drivers/net/wireless/ath/ath9k/ar9003_calib.c

index 174442beb9522d85f304be1cdc6ccbc6acf14c7d..0c391997a2f77709cf5f7531dbcdeadc338b4aed 100644 (file)
@@ -1249,7 +1249,8 @@ static void ar9003_hw_manual_peak_cal(struct ath_hw *ah, u8 chain, bool is_2g)
                REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
                              AR_PHY_65NM_RXRF_AGC_AGC2G_CALDAC_OVR, 0x0);
 
-       if (AR_SREV_9003_PCOEM(ah) || AR_SREV_9550(ah) || AR_SREV_9531(ah)) {
+       if (AR_SREV_9003_PCOEM(ah) || AR_SREV_9550(ah) || AR_SREV_9531(ah) ||
+           AR_SREV_9561(ah)) {
                if (is_2g)
                        REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
                                      AR_PHY_65NM_RXRF_AGC_AGC2G_DBDAC_OVR,
@@ -1640,7 +1641,8 @@ static bool ar9003_hw_init_cal_soc(struct ath_hw *ah,
 
 skip_tx_iqcal:
        if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) {
-               if (AR_SREV_9330_11(ah) || AR_SREV_9531(ah) || AR_SREV_9550(ah)) {
+               if (AR_SREV_9330_11(ah) || AR_SREV_9531(ah) || AR_SREV_9550(ah) ||
+                   AR_SREV_9561(ah)) {
                        for (i = 0; i < AR9300_MAX_CHAINS; i++) {
                                if (!(ah->rxchainmask & (1 << i)))
                                        continue;