drm/radeon/kms/r4xx: cleanup atom path
authorAlex Deucher <alexdeucher@gmail.com>
Wed, 20 Jan 2010 21:22:53 +0000 (16:22 -0500)
committerDave Airlie <airlied@linux.ie>
Wed, 20 Jan 2010 22:40:08 +0000 (08:40 +1000)
most of radeon_legacy_atom_set_surface() is taken care
of in atombios_set_base(), so remove the duplicate
setup and move the remaining bits (DISP_MERGE setup and
FP2 sync) to atombios_crtc.c where they are used.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@linux.ie>
drivers/gpu/drm/radeon/atombios_crtc.c
drivers/gpu/drm/radeon/radeon_legacy_crtc.c
drivers/gpu/drm/radeon/radeon_mode.h

index a60610271af63c50294a6a305741bd8bc7dd2f61..e098bd0cbd266fc7bea725522f9a9f9ad0d790f8 100644 (file)
@@ -718,6 +718,30 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
                return radeon_crtc_set_base(crtc, x, y, old_fb);
 }
 
+/* properly set additional regs when using atombios */
+static void radeon_legacy_atom_fixup(struct drm_crtc *crtc)
+{
+       struct drm_device *dev = crtc->dev;
+       struct radeon_device *rdev = dev->dev_private;
+       struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
+       u32 disp_merge_cntl;
+
+       switch (radeon_crtc->crtc_id) {
+       case 0:
+               disp_merge_cntl = RREG32(RADEON_DISP_MERGE_CNTL);
+               disp_merge_cntl &= ~RADEON_DISP_RGB_OFFSET_EN;
+               WREG32(RADEON_DISP_MERGE_CNTL, disp_merge_cntl);
+               break;
+       case 1:
+               disp_merge_cntl = RREG32(RADEON_DISP2_MERGE_CNTL);
+               disp_merge_cntl &= ~RADEON_DISP2_RGB_OFFSET_EN;
+               WREG32(RADEON_DISP2_MERGE_CNTL, disp_merge_cntl);
+               WREG32(RADEON_FP_H2_SYNC_STRT_WID,   RREG32(RADEON_CRTC2_H_SYNC_STRT_WID));
+               WREG32(RADEON_FP_V2_SYNC_STRT_WID,   RREG32(RADEON_CRTC2_V_SYNC_STRT_WID));
+               break;
+       }
+}
+
 int atombios_crtc_mode_set(struct drm_crtc *crtc,
                           struct drm_display_mode *mode,
                           struct drm_display_mode *adjusted_mode,
@@ -740,7 +764,7 @@ int atombios_crtc_mode_set(struct drm_crtc *crtc,
                if (radeon_crtc->crtc_id == 0)
                        atombios_set_crtc_dtd_timing(crtc, adjusted_mode);
                atombios_crtc_set_base(crtc, x, y, old_fb);
-               radeon_legacy_atom_set_surface(crtc);
+               radeon_legacy_atom_fixup(crtc);
        }
        atombios_overscan_setup(crtc, mode, adjusted_mode);
        atombios_scaler_setup(crtc);
index cc27485a07ad9b681269d6ed3fe2889161338bab..762e07b08951cc76b7aa4b0b1589b99abf8bab30 100644 (file)
@@ -339,69 +339,6 @@ void radeon_crtc_dpms(struct drm_crtc *crtc, int mode)
        }
 }
 
-/* properly set crtc bpp when using atombios */
-void radeon_legacy_atom_set_surface(struct drm_crtc *crtc)
-{
-       struct drm_device *dev = crtc->dev;
-       struct radeon_device *rdev = dev->dev_private;
-       struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
-       int format;
-       uint32_t crtc_gen_cntl;
-       uint32_t disp_merge_cntl;
-       uint32_t crtc_pitch;
-
-       switch (crtc->fb->bits_per_pixel) {
-       case 8:
-               format = 2;
-               break;
-       case 15:      /*  555 */
-               format = 3;
-               break;
-       case 16:      /*  565 */
-               format = 4;
-               break;
-       case 24:      /*  RGB */
-               format = 5;
-               break;
-       case 32:      /* xRGB */
-               format = 6;
-               break;
-       default:
-               return;
-       }
-
-       crtc_pitch  = ((((crtc->fb->pitch / (crtc->fb->bits_per_pixel / 8)) * crtc->fb->bits_per_pixel) +
-                       ((crtc->fb->bits_per_pixel * 8) - 1)) /
-                      (crtc->fb->bits_per_pixel * 8));
-       crtc_pitch |= crtc_pitch << 16;
-
-       WREG32(RADEON_CRTC_PITCH + radeon_crtc->crtc_offset, crtc_pitch);
-
-       switch (radeon_crtc->crtc_id) {
-       case 0:
-               disp_merge_cntl = RREG32(RADEON_DISP_MERGE_CNTL);
-               disp_merge_cntl &= ~RADEON_DISP_RGB_OFFSET_EN;
-               WREG32(RADEON_DISP_MERGE_CNTL, disp_merge_cntl);
-
-               crtc_gen_cntl = RREG32(RADEON_CRTC_GEN_CNTL) & 0xfffff0ff;
-               crtc_gen_cntl |= (format << 8);
-               crtc_gen_cntl |= RADEON_CRTC_EXT_DISP_EN;
-               WREG32(RADEON_CRTC_GEN_CNTL, crtc_gen_cntl);
-               break;
-       case 1:
-               disp_merge_cntl = RREG32(RADEON_DISP2_MERGE_CNTL);
-               disp_merge_cntl &= ~RADEON_DISP2_RGB_OFFSET_EN;
-               WREG32(RADEON_DISP2_MERGE_CNTL, disp_merge_cntl);
-
-               crtc_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL) & 0xfffff0ff;
-               crtc_gen_cntl |= (format << 8);
-               WREG32(RADEON_CRTC2_GEN_CNTL, crtc_gen_cntl);
-               WREG32(RADEON_FP_H2_SYNC_STRT_WID,   RREG32(RADEON_CRTC2_H_SYNC_STRT_WID));
-               WREG32(RADEON_FP_V2_SYNC_STRT_WID,   RREG32(RADEON_CRTC2_V_SYNC_STRT_WID));
-               break;
-       }
-}
-
 int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
                         struct drm_framebuffer *old_fb)
 {
index 91cb041cb40dae8df07951808558f359d54f05c7..eb19b3022b0e1542c5ff578f3521a712f7501c90 100644 (file)
@@ -453,7 +453,6 @@ extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
 
 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
                                 struct drm_framebuffer *old_fb);
-extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc);
 
 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
                                  struct drm_file *file_priv,