staging: brcm80211: remove checks for ANTSEL related compiler definitions

The source module antsel is always included in the current driver so
any checks for it being compiled in are redundant and have been removed.

Reviewed-by: Roland Vossen <rvossen@broadcom.com>
Reviewed-by: Brett Rudley <brudley@broadcom.com>
Signed-off-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c b/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c
index d438d9a2a3c32dcc49f6a35e5d1c2e4ab8240d8b..7aaa958a738d818140d5277c9be35f5cc8475929 100644 (file)
--- a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c
+++ b/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c
@@ -1178,8 +1178,7 @@ wlc_ampdu_dotxstatus_complete(struct ampdu_info *ampdu, struct scb *scb,
        wlc_send_q(wlc, wlc->active_queue);
 
        /* update rate state */
-       if (WLANTSEL_ENAB(wlc))
-               antselid = wlc_antsel_antsel2id(wlc->asi, mimoantsel);
+       antselid = wlc_antsel_antsel2id(wlc->asi, mimoantsel);
 
        wlc_txfifo_complete(wlc, queue, ampdu->txpkt_weight);
 }

diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c b/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c
index 3e453899db31bdee5ea70aa9fe053266a2a46287..8c59898a418bf0497ff483426daebd24e4ff557d 100644 (file)
--- a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c
+++ b/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c
@@ -16,8 +16,6 @@
 
 #include <wlc_cfg.h>
 
-#ifdef WLANTSEL
-
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/pci.h>
@@ -327,5 +325,3 @@ static int wlc_antsel_cfgupd(struct antsel_info *asi, wlc_antselcfg_t *antsel)
 
        return 0;
 }
-
-#endif                         /* WLANTSEL */

diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c
index 3eb7a4a659cd45d9c0a72e23e50abc7a0ec25d4f..1a49c6e52e4155b1de38f7c8060336abe20cda61 100644 (file)
--- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c
+++ b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c
@@ -2582,39 +2582,39 @@ static void wlc_gpio_init(struct wlc_info *wlc)
        gc = gm = 0;
 
        /* Allocate GPIOs for mimo antenna diversity feature */
-       if (WLANTSEL_ENAB(wlc)) {
-               if (wlc_hw->antsel_type == ANTSEL_2x3) {
-                       /* Enable antenna diversity, use 2x3 mode */
-                       wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
-                                    MHF3_ANTSEL_EN, WLC_BAND_ALL);
-                       wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE,
-                                    MHF3_ANTSEL_MODE, WLC_BAND_ALL);
-
-                       /* init superswitch control */
-                       wlc_phy_antsel_init(wlc_hw->band->pi, false);
-
-               } else if (wlc_hw->antsel_type == ANTSEL_2x4) {
-                       ASSERT((gm & BOARD_GPIO_12) == 0);
-                       gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13);
-                       /* The board itself is powered by these GPIOs (when not sending pattern)
-                        * So set them high
-                        */
-                       OR_REG(osh, &regs->psm_gpio_oe,
-                              (BOARD_GPIO_12 | BOARD_GPIO_13));
-                       OR_REG(osh, &regs->psm_gpio_out,
-                              (BOARD_GPIO_12 | BOARD_GPIO_13));
-
-                       /* Enable antenna diversity, use 2x4 mode */
-                       wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
-                                    MHF3_ANTSEL_EN, WLC_BAND_ALL);
-                       wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0,
-                                    WLC_BAND_ALL);
-
-                       /* Configure the desired clock to be 4Mhz */
-                       wlc_bmac_write_shm(wlc_hw, M_ANTSEL_CLKDIV,
-                                          ANTSEL_CLKDIV_4MHZ);
-               }
+       if (wlc_hw->antsel_type == ANTSEL_2x3) {
+               /* Enable antenna diversity, use 2x3 mode */
+               wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
+                            MHF3_ANTSEL_EN, WLC_BAND_ALL);
+               wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE,
+                            MHF3_ANTSEL_MODE, WLC_BAND_ALL);
+
+               /* init superswitch control */
+               wlc_phy_antsel_init(wlc_hw->band->pi, false);
+
+       } else if (wlc_hw->antsel_type == ANTSEL_2x4) {
+               ASSERT((gm & BOARD_GPIO_12) == 0);
+               gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13);
+               /*
+                * The board itself is powered by these GPIOs
+                * (when not sending pattern) so set them high
+                */
+               OR_REG(osh, &regs->psm_gpio_oe,
+                      (BOARD_GPIO_12 | BOARD_GPIO_13));
+               OR_REG(osh, &regs->psm_gpio_out,
+                      (BOARD_GPIO_12 | BOARD_GPIO_13));
+
+               /* Enable antenna diversity, use 2x4 mode */
+               wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
+                            MHF3_ANTSEL_EN, WLC_BAND_ALL);
+               wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0,
+                            WLC_BAND_ALL);
+
+               /* Configure the desired clock to be 4Mhz */
+               wlc_bmac_write_shm(wlc_hw, M_ANTSEL_CLKDIV,
+                                  ANTSEL_CLKDIV_4MHZ);
        }
+
        /* gpio 9 controls the PA.  ucode is responsible for wiggling out and oe */
        if (wlc_hw->boardflags & BFL_PACTRL)
                gm |= gc |= BOARD_GPIO_PACTRL;

diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_cfg.h b/drivers/staging/brcm80211/brcmsmac/wlc_cfg.h
index 3decb7d1a5e50136eb7b9da115bceac0d12477a2..85fbd06353100b1e27dff65c0366c48d07aea7bf 100644 (file)
--- a/drivers/staging/brcm80211/brcmsmac/wlc_cfg.h
+++ b/drivers/staging/brcm80211/brcmsmac/wlc_cfg.h
@@ -69,10 +69,6 @@
 #define SSLPNCONF      SSLPNPHY_DEFAULT
 #endif
 
-#define BAND2G
-#define BAND5G
-#define WLANTSEL       1
-
 /********************************************************************
  * Phy/Core Configuration.  Defines macros to to check core phy/rev *
  * compile-time configuration.  Defines default core support.       *
@@ -281,6 +277,4 @@
 #define WLBANDINITDATA(_data)  _data
 #define WLBANDINITFN(_fn)      _fn
 
-#define WLANTSEL_ENAB(wlc)     1
-
 #endif                         /* _wlc_cfg_h_ */

diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_mac80211.c b/drivers/staging/brcm80211/brcmsmac/wlc_mac80211.c
index fb88890d0423bc9d056f82a15aa0a1c0818399b0..628019862f5841affef1ae3628adb4be8825ac31 100644 (file)
--- a/drivers/staging/brcm80211/brcmsmac/wlc_mac80211.c
+++ b/drivers/staging/brcm80211/brcmsmac/wlc_mac80211.c
@@ -861,8 +861,7 @@ void wlc_set_chanspec(struct wlc_info *wlc, chanspec_t chanspec)
 
        /* init antenna selection */
        if (CHSPEC_WLC_BW(old_chanspec) != CHSPEC_WLC_BW(chanspec)) {
-               if (WLANTSEL_ENAB(wlc))
-                       wlc_antsel_init(wlc->asi);
+               wlc_antsel_init(wlc->asi);
 
                /* Fix the hardware rateset based on bw.
                 * Mainly add MCS32 for 40Mhz, remove MCS 32 for 20Mhz
@@ -1308,8 +1307,7 @@ static void WLBANDINITFN(wlc_bsinit) (struct wlc_info *wlc)
        wlc_ucode_mac_upd(wlc);
 
        /* init antenna selection */
-       if (WLANTSEL_ENAB(wlc))
-               wlc_antsel_init(wlc->asi);
+       wlc_antsel_init(wlc->asi);
 
 }
 
@@ -2003,15 +2001,13 @@ void *wlc_attach(void *wl, u16 vendor, u16 device, uint unit, bool piomode,
        /* initialize radio_mpc_disable according to wlc->mpc */
        wlc_radio_mpc_upd(wlc);
 
-       if (WLANTSEL_ENAB(wlc)) {
-               if ((wlc->pub->sih->chip) == BCM43235_CHIP_ID) {
-                       if ((getintvar(wlc->pub->vars, "aa2g") == 7) ||
-                           (getintvar(wlc->pub->vars, "aa5g") == 7)) {
-                               wlc_bmac_antsel_set(wlc->hw, 1);
-                       }
-               } else {
-                       wlc_bmac_antsel_set(wlc->hw, wlc->asi->antsel_avail);
+       if ((wlc->pub->sih->chip) == BCM43235_CHIP_ID) {
+               if ((getintvar(wlc->pub->vars, "aa2g") == 7) ||
+                   (getintvar(wlc->pub->vars, "aa5g") == 7)) {
+                       wlc_bmac_antsel_set(wlc->hw, 1);
                }
+       } else {
+               wlc_bmac_antsel_set(wlc->hw, wlc->asi->antsel_avail);
        }
 
        if (perr)
@@ -5753,11 +5749,9 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw,
        u32 rate_val[2];
        bool hwtkmic = false;
        u16 mimo_ctlchbw = PHY_TXC1_BW_20MHZ;
-#ifdef WLANTSEL
 #define ANTCFG_NONE 0xFF
        u8 antcfg = ANTCFG_NONE;
        u8 fbantcfg = ANTCFG_NONE;
-#endif
        uint phyctl1_stf = 0;
        u16 durid = 0;
        struct ieee80211_tx_rate *txrate[2];
@@ -5891,8 +5885,7 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw,
                        ASSERT(RSPEC_ACTIVE(rspec[k]));
                        rspec[k] = WLC_RATE_1M;
                } else {
-                       if (WLANTSEL_ENAB(wlc) &&
-                           !is_multicast_ether_addr(h->addr1)) {
+                       if (!is_multicast_ether_addr(h->addr1)) {
                                /* set tx antenna config */
                                wlc_antsel_antcfg_get(wlc->asi, false, false, 0,
                                                      0, &antcfg, &fbantcfg);