/*
* XXX not sure what interrupt C group does
* wait for dma to fill output fifo
- * ni_writeb(dev, Interrupt_Group_C_Enable_Bit, NI_M_INTC_ENA_REG);
+ * ni_writeb(dev, NI_M_INTC_ENA, NI_M_INTC_ENA_REG);
*/
for (i = 0; i < timeout; ++i) {
if (ni_readl(dev, NI_M_CDIO_STATUS_REG) &
#define NI_M_AI_CFG_BANK_SEL(x) ((((x) & 0x40) << 4) | ((x) & 0x30))
#define NI_M_AI_CFG_CHAN_SEL(x) (((x) & 0xf) << 0)
#define NI_M_INTC_ENA_REG 0x088
+#define NI_M_INTC_ENA BIT(0)
#define NI_M_INTC_STATUS_REG 0x088
#define NI_M_ATRIG_CTRL_REG 0x08c
#define NI_M_AO_SER_INT_ENA_REG 0x0a0
#define NI_M_AO_REF_ATTENUATION_REG(x) (0x264 + (x))
#define NI_M_AO_REF_ATTENUATION_X5 BIT(0)
-enum Interrupt_C_Enable_Bits {
- Interrupt_Group_C_Enable_Bit = 0x1
-};
-
enum Interrupt_C_Status_Bits {
Interrupt_Group_C_Status_Bit = 0x1
};