ASoC: Intel: Skylake: Reset the controller in probe
authorguneshwor.o.singh@intel.com <guneshwor.o.singh@intel.com>
Fri, 28 Jul 2017 10:42:13 +0000 (16:12 +0530)
committerMark Brown <broonie@kernel.org>
Tue, 1 Aug 2017 12:33:58 +0000 (13:33 +0100)
Controller can be in reset state by default. Capability structure
traversal requires the controller to be out of reset else it
results in broken capability parsing. Hence make sure that controller is
out of reset before parsing capabilities by doing a full reset.

Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com>
Acked-By: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/intel/skylake/skl.c

index 01a2dd6518a41040474cfc6fc7f98e21dbbd3fc8..b9e1310673f0eb2d70ed5dffa2a1237b8b10f47c 100644 (file)
@@ -702,6 +702,8 @@ static int skl_first_init(struct hdac_ext_bus *ebus)
                return -ENXIO;
        }
 
+       skl_init_chip(bus, true);
+
        snd_hdac_bus_parse_capabilities(bus);
 
        if (skl_acquire_irq(ebus, 0) < 0)