ARM: ux500: Supply the SDI (MMC) clocks lookup to the DBX500 DT
authorLee Jones <lee.jones@linaro.org>
Thu, 6 Jun 2013 11:28:50 +0000 (12:28 +0100)
committerLinus Walleij <linus.walleij@linaro.org>
Thu, 26 Sep 2013 09:04:54 +0000 (11:04 +0200)
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
arch/arm/boot/dts/ste-dbx5x0.dtsi

index fe3df41fddb7af8a83f9e23e7b3f58daf4dee45a..981107f115fed3edbc43c05643ac23ab53fed6b7 100644 (file)
                               <&dma 29 0 0x0>; /* Logical - MemToDev */
                        dma-names = "rx", "tx";
 
+                       clocks = <&prcc_kclk 1 5>, <&prcc_pclk 1 5>;
+                       clock-names = "sdi", "apb_pclk";
+
                        status = "disabled";
                };
 
                               <&dma 32 0 0x0>; /* Logical - MemToDev */
                        dma-names = "rx", "tx";
 
+                       clocks = <&prcc_kclk 2 4>, <&prcc_pclk 2 6>;
+                       clock-names = "sdi", "apb_pclk";
+
                        status = "disabled";
                };
 
                               <&dma 28 0 0x0>; /* Logical - MemToDev */
                        dma-names = "rx", "tx";
 
+                       clocks = <&prcc_kclk 3 4>, <&prcc_pclk 3 4>;
+                       clock-names = "sdi", "apb_pclk";
+
                        status = "disabled";
                };
 
                        compatible = "arm,pl18x", "arm,primecell";
                        reg = <0x80119000 0x1000>;
                        interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>;
+
+                       clocks = <&prcc_kclk 2 5>, <&prcc_pclk 2 7>;
+                       clock-names = "sdi", "apb_pclk";
+
                        status = "disabled";
                };
 
                               <&dma 42 0 0x0>; /* Logical - MemToDev */
                        dma-names = "rx", "tx";
 
+                       clocks = <&prcc_kclk 2 2>, <&prcc_pclk 2 4>;
+                       clock-names = "sdi", "apb_pclk";
+
                        status = "disabled";
                };
 
                        compatible = "arm,pl18x", "arm,primecell";
                        reg = <0x80008000 0x1000>;
                        interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
+
+                       clocks = <&prcc_kclk 3 7>, <&prcc_pclk 3 7>;
+                       clock-names = "sdi", "apb_pclk";
+
                        status = "disabled";
                };