Documentation: Rename gpio controller name from cygnus to iproc
authorPramod Kumar <pramodku@broadcom.com>
Thu, 19 Nov 2015 03:52:18 +0000 (09:22 +0530)
committerLinus Walleij <linus.walleij@linaro.org>
Mon, 30 Nov 2015 08:42:17 +0000 (09:42 +0100)
Renamed gpio controller's driver name from cygnus to iproc to make it
more generic so that all iProc based SoCs having the same gpio controller
could use this.

Signed-off-by: Pramod Kumar <pramodku@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Documentation/devicetree/bindings/pinctrl/brcm,cygnus-gpio.txt [deleted file]
Documentation/devicetree/bindings/pinctrl/brcm,iproc-gpio.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,cygnus-gpio.txt b/Documentation/devicetree/bindings/pinctrl/brcm,cygnus-gpio.txt
deleted file mode 100644 (file)
index 8b1e5d1..0000000
+++ /dev/null
@@ -1,109 +0,0 @@
-Broadcom Cygnus GPIO/PINCONF Controller
-
-Required properties:
-
-- compatible:
-    Must be "brcm,cygnus-ccm-gpio", "brcm,cygnus-asiu-gpio",
-    "brcm,cygnus-crmu-gpio" or "brcm,iproc-gpio"
-
-- reg:
-    Define the base and range of the I/O address space that contains the Cygnus
-GPIO/PINCONF controller registers
-
-- ngpios:
-    Total number of in-use slots in GPIO controller
-
-- #gpio-cells:
-    Must be two. The first cell is the GPIO pin number (within the
-controller's pin space) and the second cell is used for the following:
-    bit[0]: polarity (0 for active high and 1 for active low)
-
-- gpio-controller:
-    Specifies that the node is a GPIO controller
-
-Optional properties:
-
-- interrupts:
-    Interrupt ID
-
-- interrupt-controller:
-    Specifies that the node is an interrupt controller
-
-- gpio-ranges:
-    Specifies the mapping between gpio controller and pin-controllers pins.
-    This requires 4 fields in cells defined as -
-    1. Phandle of pin-controller.
-    2. GPIO base pin offset.
-    3  Pin-control base pin offset.
-    4. number of gpio pins which are linearly mapped from pin base.
-
-Supported generic PINCONF properties in child nodes:
-
-- pins:
-    The list of pins (within the controller's own pin space) that properties
-in the node apply to. Pin names are "gpio-<pin>"
-
-- bias-disable:
-    Disable pin bias
-
-- bias-pull-up:
-    Enable internal pull up resistor
-
-- bias-pull-down:
-    Enable internal pull down resistor
-
-- drive-strength:
-    Valid drive strength values include 2, 4, 6, 8, 10, 12, 14, 16 (mA)
-
-Example:
-       gpio_ccm: gpio@1800a000 {
-               compatible = "brcm,cygnus-ccm-gpio";
-               reg = <0x1800a000 0x50>,
-                     <0x0301d164 0x20>;
-               ngpios = <24>;
-               #gpio-cells = <2>;
-               gpio-controller;
-               interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
-               interrupt-controller;
-
-               touch_pins: touch_pins {
-                       pwr: pwr {
-                               pins = "gpio-0";
-                               drive-strength = <16>;
-                       };
-
-                       event: event {
-                               pins = "gpio-1";
-                               bias-pull-up;
-                       };
-               };
-       };
-
-       gpio_asiu: gpio@180a5000 {
-               compatible = "brcm,cygnus-asiu-gpio";
-               reg = <0x180a5000 0x668>;
-               ngpios = <146>;
-               #gpio-cells = <2>;
-               gpio-controller;
-               interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
-               interrupt-controller;
-               gpio-ranges = <&pinctrl 0 42 1>,
-                               <&pinctrl 1 44 3>;
-       };
-
-       /*
-        * Touchscreen that uses the CCM GPIO 0 and 1
-        */
-       tsc {
-               ...
-               ...
-               gpio-pwr = <&gpio_ccm 0 0>;
-               gpio-event = <&gpio_ccm 1 0>;
-       };
-
-       /* Bluetooth that uses the ASIU GPIO 5, with polarity inverted */
-       bluetooth {
-               ...
-               ...
-               bcm,rfkill-bank-sel = <&gpio_asiu 5 1>
-       }
diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,iproc-gpio.txt b/Documentation/devicetree/bindings/pinctrl/brcm,iproc-gpio.txt
new file mode 100644 (file)
index 0000000..e427792
--- /dev/null
@@ -0,0 +1,109 @@
+Broadcom iProc GPIO/PINCONF Controller
+
+Required properties:
+
+- compatible:
+    Must be "brcm,cygnus-ccm-gpio", "brcm,cygnus-asiu-gpio",
+    "brcm,cygnus-crmu-gpio" or "brcm,iproc-gpio"
+
+- reg:
+    Define the base and range of the I/O address space that contains SoC
+GPIO/PINCONF controller registers
+
+- ngpios:
+    Total number of in-use slots in GPIO controller
+
+- #gpio-cells:
+    Must be two. The first cell is the GPIO pin number (within the
+controller's pin space) and the second cell is used for the following:
+    bit[0]: polarity (0 for active high and 1 for active low)
+
+- gpio-controller:
+    Specifies that the node is a GPIO controller
+
+Optional properties:
+
+- interrupts:
+    Interrupt ID
+
+- interrupt-controller:
+    Specifies that the node is an interrupt controller
+
+- gpio-ranges:
+    Specifies the mapping between gpio controller and pin-controllers pins.
+    This requires 4 fields in cells defined as -
+    1. Phandle of pin-controller.
+    2. GPIO base pin offset.
+    3  Pin-control base pin offset.
+    4. number of gpio pins which are linearly mapped from pin base.
+
+Supported generic PINCONF properties in child nodes:
+
+- pins:
+    The list of pins (within the controller's own pin space) that properties
+in the node apply to. Pin names are "gpio-<pin>"
+
+- bias-disable:
+    Disable pin bias
+
+- bias-pull-up:
+    Enable internal pull up resistor
+
+- bias-pull-down:
+    Enable internal pull down resistor
+
+- drive-strength:
+    Valid drive strength values include 2, 4, 6, 8, 10, 12, 14, 16 (mA)
+
+Example:
+       gpio_ccm: gpio@1800a000 {
+               compatible = "brcm,cygnus-ccm-gpio";
+               reg = <0x1800a000 0x50>,
+                     <0x0301d164 0x20>;
+               ngpios = <24>;
+               #gpio-cells = <2>;
+               gpio-controller;
+               interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-controller;
+
+               touch_pins: touch_pins {
+                       pwr: pwr {
+                               pins = "gpio-0";
+                               drive-strength = <16>;
+                       };
+
+                       event: event {
+                               pins = "gpio-1";
+                               bias-pull-up;
+                       };
+               };
+       };
+
+       gpio_asiu: gpio@180a5000 {
+               compatible = "brcm,cygnus-asiu-gpio";
+               reg = <0x180a5000 0x668>;
+               ngpios = <146>;
+               #gpio-cells = <2>;
+               gpio-controller;
+               interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-controller;
+               gpio-ranges = <&pinctrl 0 42 1>,
+                               <&pinctrl 1 44 3>;
+       };
+
+       /*
+        * Touchscreen that uses the CCM GPIO 0 and 1
+        */
+       tsc {
+               ...
+               ...
+               gpio-pwr = <&gpio_ccm 0 0>;
+               gpio-event = <&gpio_ccm 1 0>;
+       };
+
+       /* Bluetooth that uses the ASIU GPIO 5, with polarity inverted */
+       bluetooth {
+               ...
+               ...
+               bcm,rfkill-bank-sel = <&gpio_asiu 5 1>
+       }