ARM: dts: DRA7: Add dt nodes for PWMSS
authorVignesh R <vigneshr@ti.com>
Thu, 25 Feb 2016 22:36:36 +0000 (16:36 -0600)
committerTony Lindgren <tony@atomide.com>
Mon, 29 Feb 2016 23:21:28 +0000 (15:21 -0800)
Add PWMSS device tree nodes for DRA7 SoC family and add documentation
for dt bindings.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt
Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt
arch/arm/boot/dts/dra7.dtsi

index 9c100b2c5b23c4731cc886b363330b6c1c588f36..25d91ae57de5748765694b9a56b1be5beed4ca1d 100644 (file)
@@ -4,6 +4,7 @@ Required properties:
 - compatible: Must be "ti,<soc>-ehrpwm".
   for am33xx - compatible = "ti,am33xx-ehrpwm";
   for da850  - compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm";
+  for dra7xx - compatible = "ti,dra7xx-ehrpwm", "ti,am33xx-ehrpwm";
 - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
   the cells format. The only third cell flag supported by this binding is
   PWM_POLARITY_INVERTED.
@@ -27,3 +28,10 @@ ehrpwm0: ehrpwm@0 { /* EHRPWM on da850 */
        #pwm-cells = <3>;
        reg = <0x300000 0x2000>;
 };
+
+ehrpwm0: ehrpwm@0 { /* EHRPWM on dra7xx */
+       compatible = "ti,dra7xx-ehrpwm", "ti,am33xx-ehrpwm";
+       #pwm-cells = <3>;
+       reg = <0x48440200 0x80>;
+       ti,hwmods = "ehrpwm0";
+};
index f7eae77f8354bc9a0fb8db180af816c9626cbb0a..9270ce6b2da243d8fcee6872f19896ab4f2a0e7f 100644 (file)
@@ -1,7 +1,9 @@
 TI SOC based PWM Subsystem
 
 Required properties:
-- compatible: Must be "ti,am33xx-pwmss";
+- compatible: Must be "ti,<soc>-pwmss".
+  for am33xx - compatible = "ti,am33xx-pwmss"
+  for dra7xx - compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss"
 - reg: physical base address and size of the registers map.
 - address-cells: Specify the number of u32 entries needed in child nodes.
                  Should set to 1.
@@ -29,3 +31,16 @@ pwmss0: pwmss@48300000 {
 
        /* child nodes go here */
 };
+
+epwmss0: epwmss@4843e000 { /* On DRA7xx */
+       compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss";
+       reg = <0x4843e000 0x30>;
+       ti,hwmods = "epwmss0";
+       #address-cells = <1>;
+       #size-cells = <1>;
+       ranges = <0x4843e100  0x4843e100 0x80   /* ECAP */
+                 0x4843e180  0x4843e180 0x80   /* EQEP */
+                 0x4843e200  0x4843e200 0x80>; /* EHRPWM */
+
+       /* child nodes go here */
+};
index 098b4dd14b01ffa61c5e147ee3c54d393a003c6d..6a4572a5e35f925d5639d61b8400ce9199db9b70 100644 (file)
                                clock-names = "fck", "sys_clk";
                        };
                };
+
+               epwmss0: epwmss@4843e000 {
+                       compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss";
+                       reg = <0x4843e000 0x30>;
+                       ti,hwmods = "epwmss0";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       status = "disabled";
+                       ranges = <0x4843e100  0x4843e100 0x80  /* ECAP */
+                                 0x4843e180  0x4843e180 0x80  /* EQEP */
+                                 0x4843e200  0x4843e200 0x80>;/* EHRPWM */
+
+                       ehrpwm0: ehrpwm@4843e200 {
+                               compatible = "ti,dra7xx-ehrpwm",
+                                            "ti,am33xx-ehrpwm";
+                               #pwm-cells = <3>;
+                               reg = <0x4843e200 0x80>;
+                               ti,hwmods = "ehrpwm0";
+                               status = "disabled";
+                       };
+               };
+
+               epwmss1: epwmss@48440000 {
+                       compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss";
+                       reg = <0x48440000 0x30>;
+                       ti,hwmods = "epwmss1";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       status = "disabled";
+                       ranges = <0x48440100  0x48440100  0x80   /* ECAP */
+                                 0x48440180  0x48440180  0x80   /* EQEP */
+                                 0x48440200  0x48440200  0x80>; /* EHRPWM */
+
+                       ehrpwm1: ehrpwm@48440200 {
+                               compatible = "ti,dra7xx-ehrpwm",
+                                            "ti,am33xx-ehrpwm";
+                               #pwm-cells = <3>;
+                               reg = <0x48440200 0x80>;
+                               ti,hwmods = "ehrpwm1";
+                               status = "disabled";
+                       };
+               };
+
+               epwmss2: epwmss@48442000 {
+                       compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss";
+                       reg = <0x48442000 0x30>;
+                       ti,hwmods = "epwmss2";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       status = "disabled";
+
+                       ranges = <0x48442100  0x48442100  0x80   /* ECAP */
+                                 0x48442180  0x48442180  0x80   /* EQEP */
+                                 0x48442200  0x48442200  0x80>; /* EHRPWM */
+
+                       ehrpwm2: ehrpwm@48442200 {
+                               compatible = "ti,dra7xx-ehrpwm",
+                                            "ti,am33xx-ehrpwm";
+                               #pwm-cells = <3>;
+                               reg = <0x48442200 0x80>;
+                               ti,hwmods = "ehrpwm2";
+                               status = "disabled";
+                       };
+               };
        };
 
        thermal_zones: thermal-zones {