drm/radeon: stop poisoning the GART TLB
authorChristian König <christian.koenig@amd.com>
Wed, 4 Jun 2014 13:29:56 +0000 (15:29 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 17 Jul 2014 22:58:03 +0000 (15:58 -0700)
commit 0986c1a55ca64b44ee126a2f719a6e9f28cbe0ed upstream.

When we set the valid bit on invalid GART entries they are
loaded into the TLB when an adjacent entry is loaded. This
poisons the TLB with invalid entries which are sometimes
not correctly removed on TLB flush.

For stable inclusion the patch probably needs to be modified a bit.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/radeon/rs600.c

index 670b555d2ca229c3b39ac46cbbbf8e06e678f25b..ae813fef0818e0b7de30e7631a0aa4979f245c34 100644 (file)
@@ -582,8 +582,10 @@ int rs600_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr)
                return -EINVAL;
        }
        addr = addr & 0xFFFFFFFFFFFFF000ULL;
-       addr |= R600_PTE_VALID | R600_PTE_SYSTEM | R600_PTE_SNOOPED;
-       addr |= R600_PTE_READABLE | R600_PTE_WRITEABLE;
+       if (addr != rdev->dummy_page.addr)
+               addr |= R600_PTE_VALID | R600_PTE_READABLE |
+                       R600_PTE_WRITEABLE;
+       addr |= R600_PTE_SYSTEM | R600_PTE_SNOOPED;
        writeq(addr, ptr + (i * 8));
        return 0;
 }