[MIPS] Fix instable BogoMIPS on multi-issue processors.

Increase alignment of BogoMIPS loop to 8 bytes.  Having the delay loop
overlap cache line boundaries may cause instable delays.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/include/asm-mips/delay.h b/include/asm-mips/delay.h
index 64dd45150f64f69e38c7116a28a05a0c508015ae..928f30f8c45cd6cfe405743d2faf388da033f1d1 100644 (file)
--- a/include/asm-mips/delay.h
+++ b/include/asm-mips/delay.h
@@ -19,20 +19,22 @@ static inline void __delay(unsigned long loops)
 {
        if (sizeof(long) == 4)
                __asm__ __volatile__ (
-               ".set\tnoreorder\n"
-               "1:\tbnez\t%0,1b\n\t"
-               "subu\t%0,1\n\t"
-               ".set\treorder"
+               "       .set    noreorder                               \n"
+               "       .align  3                                       \n"
+               "1:     bnez    %0, 1b                                  \n"
+               "       subu    %0, 1                                   \n"
+               "       .set    reorder                                 \n"
                : "=r" (loops)
                : "0" (loops));
        else if (sizeof(long) == 8)
                __asm__ __volatile__ (
-               ".set\tnoreorder\n"
-               "1:\tbnez\t%0,1b\n\t"
-               "dsubu\t%0,1\n\t"
-               ".set\treorder"
-               :"=r" (loops)
-               :"0" (loops));
+               "       .set    noreorder                               \n"
+               "       .align  3                                       \n"
+               "1:     bnez    %0, 1b                                  \n"
+               "       dsubu   %0, 1                                   \n"
+               "       .set    reorder                                 \n"
+               : "=r" (loops)
+               : "0" (loops));
 }