drm/gma500: Add generic code for clock calculation
authorPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
Sun, 30 Jun 2013 19:39:00 +0000 (21:39 +0200)
committerPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
Tue, 23 Jul 2013 23:47:16 +0000 (01:47 +0200)
This patch aims to unify the bits and pieces that are common (or similar
enough) for pll clock calculations. Nothing makes use of this code yet
That will come in later patches.

Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
drivers/gpu/drm/gma500/Makefile
drivers/gpu/drm/gma500/gma_display.c [new file with mode: 0644]
drivers/gpu/drm/gma500/gma_display.h [new file with mode: 0644]
drivers/gpu/drm/gma500/psb_drv.h
drivers/gpu/drm/gma500/psb_intel_display.c
drivers/gpu/drm/gma500/psb_intel_drv.h

index 7a2d40a5c1e181e9406fdd76c1b6403d11a32a73..e9064dd9045dec0aeb784a945237662b0e37ca1b 100644 (file)
@@ -15,6 +15,7 @@ gma500_gfx-y += \
          mmu.o \
          power.o \
          psb_drv.o \
+         gma_display.o \
          psb_intel_display.o \
          psb_intel_lvds.o \
          psb_intel_modes.o \
diff --git a/drivers/gpu/drm/gma500/gma_display.c b/drivers/gpu/drm/gma500/gma_display.c
new file mode 100644 (file)
index 0000000..8f66d5c
--- /dev/null
@@ -0,0 +1,143 @@
+/*
+ * Copyright © 2006-2011 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Authors:
+ *     Eric Anholt <eric@anholt.net>
+ *     Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
+ */
+
+#include <drm/drmP.h>
+#include "gma_display.h"
+#include "psb_intel_drv.h"
+#include "psb_intel_reg.h"
+#include "psb_drv.h"
+
+/**
+ * Returns whether any output on the specified pipe is of the specified type
+ */
+bool gma_pipe_has_type(struct drm_crtc *crtc, int type)
+{
+       struct drm_device *dev = crtc->dev;
+       struct drm_mode_config *mode_config = &dev->mode_config;
+       struct drm_connector *l_entry;
+
+       list_for_each_entry(l_entry, &mode_config->connector_list, head) {
+               if (l_entry->encoder && l_entry->encoder->crtc == crtc) {
+                       struct psb_intel_encoder *psb_intel_encoder =
+                                       psb_intel_attached_encoder(l_entry);
+                       if (psb_intel_encoder->type == type)
+                               return true;
+               }
+       }
+
+       return false;
+}
+
+#define GMA_PLL_INVALID(s) { /* DRM_ERROR(s); */ return false; }
+
+bool gma_pll_is_valid(struct drm_crtc *crtc,
+                     const struct gma_limit_t *limit,
+                     struct gma_clock_t *clock)
+{
+       if (clock->p1 < limit->p1.min || limit->p1.max < clock->p1)
+               GMA_PLL_INVALID("p1 out of range");
+       if (clock->p < limit->p.min || limit->p.max < clock->p)
+               GMA_PLL_INVALID("p out of range");
+       if (clock->m2 < limit->m2.min || limit->m2.max < clock->m2)
+               GMA_PLL_INVALID("m2 out of range");
+       if (clock->m1 < limit->m1.min || limit->m1.max < clock->m1)
+               GMA_PLL_INVALID("m1 out of range");
+       /* On CDV m1 is always 0 */
+       if (clock->m1 <= clock->m2 && clock->m1 != 0)
+               GMA_PLL_INVALID("m1 <= m2 && m1 != 0");
+       if (clock->m < limit->m.min || limit->m.max < clock->m)
+               GMA_PLL_INVALID("m out of range");
+       if (clock->n < limit->n.min || limit->n.max < clock->n)
+               GMA_PLL_INVALID("n out of range");
+       if (clock->vco < limit->vco.min || limit->vco.max < clock->vco)
+               GMA_PLL_INVALID("vco out of range");
+       /* XXX: We may need to be checking "Dot clock"
+        * depending on the multiplier, connector, etc.,
+        * rather than just a single range.
+        */
+       if (clock->dot < limit->dot.min || limit->dot.max < clock->dot)
+               GMA_PLL_INVALID("dot out of range");
+
+       return true;
+}
+
+bool gma_find_best_pll(const struct gma_limit_t *limit,
+                      struct drm_crtc *crtc, int target, int refclk,
+                      struct gma_clock_t *best_clock)
+{
+       struct drm_device *dev = crtc->dev;
+       const struct gma_clock_funcs *clock_funcs =
+                                       to_psb_intel_crtc(crtc)->clock_funcs;
+       struct gma_clock_t clock;
+       int err = target;
+
+       if (gma_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) &&
+           (REG_READ(LVDS) & LVDS_PORT_EN) != 0) {
+               /*
+                * For LVDS, if the panel is on, just rely on its current
+                * settings for dual-channel.  We haven't figured out how to
+                * reliably set up different single/dual channel state, if we
+                * even can.
+                */
+               if ((REG_READ(LVDS) & LVDS_CLKB_POWER_MASK) ==
+                   LVDS_CLKB_POWER_UP)
+                       clock.p2 = limit->p2.p2_fast;
+               else
+                       clock.p2 = limit->p2.p2_slow;
+       } else {
+               if (target < limit->p2.dot_limit)
+                       clock.p2 = limit->p2.p2_slow;
+               else
+                       clock.p2 = limit->p2.p2_fast;
+       }
+
+       memset(best_clock, 0, sizeof(*best_clock));
+
+       /* m1 is always 0 on CDV so the outmost loop will run just once */
+       for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock.m1++) {
+               for (clock.m2 = limit->m2.min;
+                    (clock.m2 < clock.m1 || clock.m1 == 0) &&
+                     clock.m2 <= limit->m2.max; clock.m2++) {
+                       for (clock.n = limit->n.min;
+                            clock.n <= limit->n.max; clock.n++) {
+                               for (clock.p1 = limit->p1.min;
+                                    clock.p1 <= limit->p1.max;
+                                    clock.p1++) {
+                                       int this_err;
+
+                                       clock_funcs->clock(refclk, &clock);
+
+                                       if (!clock_funcs->pll_is_valid(crtc,
+                                                               limit, &clock))
+                                               continue;
+
+                                       this_err = abs(clock.dot - target);
+                                       if (this_err < err) {
+                                               *best_clock = clock;
+                                               err = this_err;
+                                       }
+                               }
+                       }
+               }
+       }
+
+       return err != target;
+}
diff --git a/drivers/gpu/drm/gma500/gma_display.h b/drivers/gpu/drm/gma500/gma_display.h
new file mode 100644 (file)
index 0000000..a5d8aa3
--- /dev/null
@@ -0,0 +1,74 @@
+/*
+ * Copyright © 2006-2011 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Authors:
+ *     Eric Anholt <eric@anholt.net>
+ *     Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
+ */
+
+#ifndef _GMA_DISPLAY_H_
+#define _GMA_DISPLAY_H_
+
+struct gma_clock_t {
+       /* given values */
+       int n;
+       int m1, m2;
+       int p1, p2;
+       /* derived values */
+       int dot;
+       int vco;
+       int m;
+       int p;
+};
+
+struct gma_range_t {
+       int min, max;
+};
+
+struct gma_p2_t {
+       int dot_limit;
+       int p2_slow, p2_fast;
+};
+
+struct gma_limit_t {
+       struct gma_range_t dot, vco, n, m, m1, m2, p, p1;
+       struct gma_p2_t p2;
+       bool (*find_pll)(const struct gma_limit_t *, struct drm_crtc *,
+                        int target, int refclk,
+                        struct gma_clock_t *best_clock);
+};
+
+struct gma_clock_funcs {
+       void (*clock)(int refclk, struct gma_clock_t *clock);
+       const struct gma_limit_t *(*limit)(struct drm_crtc *crtc, int refclk);
+       bool (*pll_is_valid)(struct drm_crtc *crtc,
+                            const struct gma_limit_t *limit,
+                            struct gma_clock_t *clock);
+};
+
+/* Common pipe related functions */
+extern bool gma_pipe_has_type(struct drm_crtc *crtc, int type);
+
+/* Common clock related functions */
+extern const struct gma_limit_t *gma_limit(struct drm_crtc *crtc, int refclk);
+extern void gma_clock(int refclk, struct gma_clock_t *clock);
+extern bool gma_pll_is_valid(struct drm_crtc *crtc,
+                            const struct gma_limit_t *limit,
+                            struct gma_clock_t *clock);
+extern bool gma_find_best_pll(const struct gma_limit_t *limit,
+                             struct drm_crtc *crtc, int target, int refclk,
+                             struct gma_clock_t *best_clock);
+#endif
index 6053b8abcd12cc3da00f5b930829f96b15ab2ebf..eeed88c3c37ef0d87756f07b5dc4641708fff9e5 100644 (file)
@@ -27,6 +27,7 @@
 #include <drm/gma_drm.h>
 #include "psb_reg.h"
 #include "psb_intel_drv.h"
+#include "gma_display.h"
 #include "intel_bios.h"
 #include "gtt.h"
 #include "power.h"
@@ -675,6 +676,7 @@ struct psb_ops {
        /* Sub functions */
        struct drm_crtc_helper_funcs const *crtc_helper;
        struct drm_crtc_funcs const *crtc_funcs;
+       const struct gma_clock_funcs *clock_funcs;
 
        /* Setup hooks */
        int (*chip_setup)(struct drm_device *dev);
index 6666493789d1338b5db875265f99339850ceb3a2..0f1d069afa11e47495761c81aa155a820c85db0b 100644 (file)
@@ -1251,6 +1251,9 @@ void psb_intel_crtc_init(struct drm_device *dev, int pipe,
        /* Set the CRTC operations from the chip specific data */
        drm_crtc_init(dev, &psb_intel_crtc->base, dev_priv->ops->crtc_funcs);
 
+       /* Set the CRTC clock functions from chip specific data */
+       psb_intel_crtc->clock_funcs = dev_priv->ops->clock_funcs;
+
        drm_mode_crtc_set_gamma_size(&psb_intel_crtc->base, 256);
        psb_intel_crtc->pipe = pipe;
        psb_intel_crtc->plane = pipe;
index 4dcae421a58de3b47a1dc41d944e128874f80d41..bfe0408c129116e32bc77d25a48d34743a92e4bf 100644 (file)
@@ -24,6 +24,7 @@
 #include <drm/drm_crtc.h>
 #include <drm/drm_crtc_helper.h>
 #include <linux/gpio.h>
+#include "gma_display.h"
 
 /*
  * Display related stuff
@@ -188,6 +189,8 @@ struct psb_intel_crtc {
 
        /* Saved Crtc HW states */
        struct psb_intel_crtc_state *crtc_state;
+
+       const struct gma_clock_funcs *clock_funcs;
 };
 
 #define to_psb_intel_crtc(x)   \