drm/radeon: bind fan control on SI cards to hwmon interface
authorAlex Deucher <alexander.deucher@amd.com>
Wed, 7 Jan 2015 20:29:06 +0000 (15:29 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 22 Jan 2015 15:38:48 +0000 (10:38 -0500)
This adds a possibility to control fan on SI parts
via exported hwmon variables. Note that automatic
ucode fan management pauses if you choose to enable
manual fan control.  Use with caution!

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/radeon_asic.c
drivers/gpu/drm/radeon/radeon_asic.h
drivers/gpu/drm/radeon/si_dpm.c
drivers/gpu/drm/radeon/si_dpm.h

index c5ec52388144feb8831c8cc41e4071c17833e331..7c6e1930fa38662462a013a13772d234c867ce7d 100644 (file)
@@ -1953,6 +1953,10 @@ static struct radeon_asic si_asic = {
                .debugfs_print_current_performance_level = &si_dpm_debugfs_print_current_performance_level,
                .force_performance_level = &si_dpm_force_performance_level,
                .vblank_too_short = &ni_dpm_vblank_too_short,
+               .fan_ctrl_set_mode = &si_fan_ctrl_set_mode,
+               .fan_ctrl_get_mode = &si_fan_ctrl_get_mode,
+               .get_fan_speed_percent = &si_fan_ctrl_get_fan_speed_percent,
+               .set_fan_speed_percent = &si_fan_ctrl_set_fan_speed_percent,
        },
        .pflip = {
                .page_flip = &evergreen_page_flip,
index f918a8b0f45bab13ffdbd796dd07f075c93c796f..5142bc97f6b63188b866fe7b8b11379a53705885 100644 (file)
@@ -744,6 +744,12 @@ void si_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
                                                    struct seq_file *m);
 int si_dpm_force_performance_level(struct radeon_device *rdev,
                                   enum radeon_dpm_forced_level level);
+int si_fan_ctrl_get_fan_speed_percent(struct radeon_device *rdev,
+                                                u32 *speed);
+int si_fan_ctrl_set_fan_speed_percent(struct radeon_device *rdev,
+                                                u32 speed);
+u32 si_fan_ctrl_get_mode(struct radeon_device *rdev);
+void si_fan_ctrl_set_mode(struct radeon_device *rdev, u32 mode);
 
 /* DCE8 - CIK */
 void dce8_bandwidth_update(struct radeon_device *rdev);
index eff8a6444956310a591afdf3d980f2f3288cf386..3cde272f82b2c1054bc938130c37533567169537 100644 (file)
@@ -1756,6 +1756,9 @@ static int si_calculate_sclk_params(struct radeon_device *rdev,
                                    u32 engine_clock,
                                    SISLANDS_SMC_SCLK_VALUE *sclk);
 
+static void si_thermal_start_smc_fan_control(struct radeon_device *rdev);
+static void si_fan_ctrl_set_default_mode(struct radeon_device *rdev);
+
 static struct si_power_info *si_get_pi(struct radeon_device *rdev)
 {
         struct si_power_info *pi = rdev->pm.dpm.priv;
@@ -6012,36 +6015,46 @@ static int si_thermal_setup_fan_table(struct radeon_device *rdev)
 
 static int si_fan_ctrl_start_smc_fan_control(struct radeon_device *rdev)
 {
+       struct si_power_info *si_pi = si_get_pi(rdev);
        PPSMC_Result ret;
 
        ret = si_send_msg_to_smc(rdev, PPSMC_StartFanControl);
-       if (ret == PPSMC_Result_OK)
+       if (ret == PPSMC_Result_OK) {
+               si_pi->fan_is_controlled_by_smc = true;
                return 0;
-       else
+       } else {
                return -EINVAL;
+       }
 }
 
 static int si_fan_ctrl_stop_smc_fan_control(struct radeon_device *rdev)
 {
+       struct si_power_info *si_pi = si_get_pi(rdev);
        PPSMC_Result ret;
 
        ret = si_send_msg_to_smc(rdev, PPSMC_StopFanControl);
-       if (ret == PPSMC_Result_OK)
+
+       if (ret == PPSMC_Result_OK) {
+               si_pi->fan_is_controlled_by_smc = false;
                return 0;
-       else
+       } else {
                return -EINVAL;
+       }
 }
 
-#if 0
-static int si_fan_ctrl_get_fan_speed_percent(struct radeon_device *rdev,
-                                            u32 *speed)
+int si_fan_ctrl_get_fan_speed_percent(struct radeon_device *rdev,
+                                     u32 *speed)
 {
+       struct si_power_info *si_pi = si_get_pi(rdev);
        u32 duty, duty100;
        u64 tmp64;
 
        if (rdev->pm.no_fan)
                return -ENOENT;
 
+       if (si_pi->fan_is_controlled_by_smc)
+               return -EINVAL;
+
        duty100 = (RREG32(CG_FDO_CTRL1) & FMAX_DUTY100_MASK) >> FMAX_DUTY100_SHIFT;
        duty = (RREG32(CG_THERMAL_STATUS) & FDO_PWM_DUTY_MASK) >> FDO_PWM_DUTY_SHIFT;
 
@@ -6058,8 +6071,8 @@ static int si_fan_ctrl_get_fan_speed_percent(struct radeon_device *rdev,
        return 0;
 }
 
-static int si_fan_ctrl_set_fan_speed_percent(struct radeon_device *rdev,
-                                            u32 speed)
+int si_fan_ctrl_set_fan_speed_percent(struct radeon_device *rdev,
+                                     u32 speed)
 {
        u32 tmp;
        u32 duty, duty100;
@@ -6071,9 +6084,6 @@ static int si_fan_ctrl_set_fan_speed_percent(struct radeon_device *rdev,
        if (speed > 100)
                return -EINVAL;
 
-       if (rdev->pm.dpm.fan.ucode_fan_control)
-               si_fan_ctrl_stop_smc_fan_control(rdev);
-
        duty100 = (RREG32(CG_FDO_CTRL1) & FMAX_DUTY100_MASK) >> FMAX_DUTY100_SHIFT;
 
        if (duty100 == 0)
@@ -6087,11 +6097,38 @@ static int si_fan_ctrl_set_fan_speed_percent(struct radeon_device *rdev,
        tmp |= FDO_STATIC_DUTY(duty);
        WREG32(CG_FDO_CTRL0, tmp);
 
-       si_fan_ctrl_set_static_mode(rdev, FDO_PWM_MODE_STATIC);
-
        return 0;
 }
 
+void si_fan_ctrl_set_mode(struct radeon_device *rdev, u32 mode)
+{
+       if (mode) {
+               /* stop auto-manage */
+               if (rdev->pm.dpm.fan.ucode_fan_control)
+                       si_fan_ctrl_stop_smc_fan_control(rdev);
+               si_fan_ctrl_set_static_mode(rdev, mode);
+       } else {
+               /* restart auto-manage */
+               if (rdev->pm.dpm.fan.ucode_fan_control)
+                       si_thermal_start_smc_fan_control(rdev);
+               else
+                       si_fan_ctrl_set_default_mode(rdev);
+       }
+}
+
+u32 si_fan_ctrl_get_mode(struct radeon_device *rdev)
+{
+       struct si_power_info *si_pi = si_get_pi(rdev);
+       u32 tmp;
+
+       if (si_pi->fan_is_controlled_by_smc)
+               return 0;
+
+       tmp = RREG32(CG_FDO_CTRL2) & FDO_PWM_MODE_MASK;
+       return (tmp >> FDO_PWM_MODE_SHIFT);
+}
+
+#if 0
 static int si_fan_ctrl_get_fan_speed_rpm(struct radeon_device *rdev,
                                         u32 *speed)
 {
index d16bb1b5f10f8490b64ed34030848b5732f719e8..1032a68be792b7b8a2130c1f9f8ce571f4eb4108 100644 (file)
@@ -202,6 +202,7 @@ struct si_power_info {
        bool fan_ctrl_is_in_default_mode;
        u32 t_min;
        u32 fan_ctrl_default_mode;
+       bool fan_is_controlled_by_smc;
 };
 
 #define SISLANDS_INITIAL_STATE_ARB_INDEX    0