mlxsw: pci: Fix the FW ready mask length

The system-status register is actually 16-bit wide and not 8 bit-wide.

Fixes: 233fa44bd67ae ("mlxsw: pci: Implement reset done check")
Signed-off-by: Elad Raz <eladr@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h b/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h
index 708736f387e2fd91e3b7e47130691b5c48b7d2dc..d147ddd97997e3c2018f6ae9613a04474990b37e 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h
@@ -60,7 +60,7 @@
 #define MLXSW_PCI_SW_RESET_RST_BIT             BIT(0)
 #define MLXSW_PCI_SW_RESET_TIMEOUT_MSECS       5000
 #define MLXSW_PCI_FW_READY                     0xA1844
-#define MLXSW_PCI_FW_READY_MASK                        0xFF
+#define MLXSW_PCI_FW_READY_MASK                        0xFFFF
 #define MLXSW_PCI_FW_READY_MAGIC               0x5E
 
 #define MLXSW_PCI_DOORBELL_SDQ_OFFSET          0x000