* ======== io_cancel_chnl ========
* Cancel IO on a given PCPY channel.
*/
-void io_cancel_chnl(struct io_mgr *hio_mgr, u32 ulChnl)
+void io_cancel_chnl(struct io_mgr *hio_mgr, u32 chnl)
{
struct io_mgr *pio_mgr = (struct io_mgr *)hio_mgr;
struct shm *sm;
/* Inform DSP that we have no more buffers on this channel */
IO_AND_VALUE(pio_mgr->hbridge_context, struct shm, sm, host_free_mask,
- (~(1 << ulChnl)));
+ (~(1 << chnl)));
sm_interrupt_dsp(pio_mgr->hbridge_context, MBX_PCPY_CLASS);
func_end:
/* ----------------------------------- Function Prototypes */
static int add_new_msg(struct lst_list *msg_list);
static void delete_msg_mgr(struct msg_mgr *hmsg_mgr);
-static void delete_msg_queue(struct msg_queue *msg_queue_obj, u32 uNumToDSP);
+static void delete_msg_queue(struct msg_queue *msg_queue_obj, u32 num_to_dsp);
static void free_msg_list(struct lst_list *msg_list);
/*
/*
* ======== delete_msg_queue ========
*/
-static void delete_msg_queue(struct msg_queue *msg_queue_obj, u32 uNumToDSP)
+static void delete_msg_queue(struct msg_queue *msg_queue_obj, u32 num_to_dsp)
{
struct msg_mgr *hmsg_mgr;
struct msg_frame *pmsg;
hmsg_mgr = msg_queue_obj->hmsg_mgr;
- /* Pull off uNumToDSP message frames from Msg manager and free */
- for (i = 0; i < uNumToDSP; i++) {
+ /* Pull off num_to_dsp message frames from Msg manager and free */
+ for (i = 0; i < num_to_dsp; i++) {
if (!LST_IS_EMPTY(hmsg_mgr->msg_free_list)) {
pmsg = (struct msg_frame *)
static int bridge_brd_read(struct bridge_dev_context *dev_context,
OUT u8 *host_buff,
u32 dsp_addr, u32 ul_num_bytes,
- u32 ulMemType);
+ u32 mem_type);
static int bridge_brd_start(struct bridge_dev_context *dev_context,
u32 dsp_addr);
static int bridge_brd_status(struct bridge_dev_context *dev_context,
static int bridge_brd_write(struct bridge_dev_context *dev_context,
IN u8 *host_buff,
u32 dsp_addr, u32 ul_num_bytes,
- u32 ulMemType);
+ u32 mem_type);
static int bridge_brd_set_state(struct bridge_dev_context *dev_ctxt,
- u32 ulBrdState);
+ u32 brd_state);
static int bridge_brd_mem_copy(struct bridge_dev_context *dev_ctxt,
- u32 ulDspDestAddr, u32 ulDspSrcAddr,
- u32 ul_num_bytes, u32 ulMemType);
+ u32 dsp_dest_addr, u32 dsp_src_addr,
+ u32 ul_num_bytes, u32 mem_type);
static int bridge_brd_mem_write(struct bridge_dev_context *dev_context,
IN u8 *host_buff, u32 dsp_addr,
- u32 ul_num_bytes, u32 ulMemType);
+ u32 ul_num_bytes, u32 mem_type);
static int bridge_brd_mem_map(struct bridge_dev_context *dev_ctxt,
- u32 ul_mpu_addr, u32 ulVirtAddr,
+ u32 ul_mpu_addr, u32 virt_addr,
u32 ul_num_bytes, u32 ul_map_attr,
struct page **mapped_pages);
static int bridge_brd_mem_un_map(struct bridge_dev_context *dev_ctxt,
- u32 ulVirtAddr, u32 ul_num_bytes);
+ u32 virt_addr, u32 ul_num_bytes);
static int bridge_dev_create(OUT struct bridge_dev_context
**dev_cntxt,
struct dev_object *hdev_obj,
static int pte_set(struct pg_table_attrs *pt, u32 pa, u32 va,
u32 size, struct hw_mmu_map_attrs_t *attrs);
static int mem_map_vmalloc(struct bridge_dev_context *dev_ctxt,
- u32 ul_mpu_addr, u32 ulVirtAddr,
+ u32 ul_mpu_addr, u32 virt_addr,
u32 ul_num_bytes,
struct hw_mmu_map_attrs_t *hw_attrs);
*/
static int bridge_brd_read(struct bridge_dev_context *dev_ctxt,
OUT u8 *host_buff, u32 dsp_addr,
- u32 ul_num_bytes, u32 ulMemType)
+ u32 ul_num_bytes, u32 mem_type)
{
int status = 0;
struct bridge_dev_context *dev_context = dev_ctxt;
offset = dsp_addr - dev_context->dw_dsp_start_add;
} else {
status = read_ext_dsp_data(dev_context, host_buff, dsp_addr,
- ul_num_bytes, ulMemType);
+ ul_num_bytes, mem_type);
return status;
}
/* copy the data from DSP memory, */
* This routine updates the Board status.
*/
static int bridge_brd_set_state(struct bridge_dev_context *dev_ctxt,
- u32 ulBrdState)
+ u32 brd_state)
{
int status = 0;
struct bridge_dev_context *dev_context = dev_ctxt;
- dev_context->dw_brd_state = ulBrdState;
+ dev_context->dw_brd_state = brd_state;
return status;
}
*/
static int bridge_brd_write(struct bridge_dev_context *dev_ctxt,
IN u8 *host_buff, u32 dsp_addr,
- u32 ul_num_bytes, u32 ulMemType)
+ u32 ul_num_bytes, u32 mem_type)
{
int status = 0;
struct bridge_dev_context *dev_context = dev_ctxt;
if ((dsp_addr - dev_context->dw_dsp_start_add) <
dev_context->dw_internal_size) {
status = write_dsp_data(dev_ctxt, host_buff, dsp_addr,
- ul_num_bytes, ulMemType);
+ ul_num_bytes, mem_type);
} else {
status = write_ext_dsp_data(dev_context, host_buff, dsp_addr,
- ul_num_bytes, ulMemType, false);
+ ul_num_bytes, mem_type, false);
}
return status;
}
static int bridge_brd_mem_copy(struct bridge_dev_context *dev_ctxt,
- u32 ulDspDestAddr, u32 ulDspSrcAddr,
- u32 ul_num_bytes, u32 ulMemType)
+ u32 dsp_dest_addr, u32 dsp_src_addr,
+ u32 ul_num_bytes, u32 mem_type)
{
int status = 0;
- u32 src_addr = ulDspSrcAddr;
- u32 dest_addr = ulDspDestAddr;
+ u32 src_addr = dsp_src_addr;
+ u32 dest_addr = dsp_dest_addr;
u32 copy_bytes = 0;
u32 total_bytes = ul_num_bytes;
u8 host_buf[BUFFERSIZE];
total_bytes > BUFFERSIZE ? BUFFERSIZE : total_bytes;
/* Read from External memory */
status = read_ext_dsp_data(dev_ctxt, host_buf, src_addr,
- copy_bytes, ulMemType);
+ copy_bytes, mem_type);
if (DSP_SUCCEEDED(status)) {
if (dest_addr < (dev_context->dw_dsp_start_add +
dev_context->dw_internal_size)) {
/* Write to Internal memory */
status = write_dsp_data(dev_ctxt, host_buf,
dest_addr, copy_bytes,
- ulMemType);
+ mem_type);
} else {
/* Write to External memory */
status =
write_ext_dsp_data(dev_ctxt, host_buf,
dest_addr, copy_bytes,
- ulMemType, false);
+ mem_type, false);
}
}
total_bytes -= copy_bytes;
/* Mem Write does not halt the DSP to write unlike bridge_brd_write */
static int bridge_brd_mem_write(struct bridge_dev_context *dev_ctxt,
IN u8 *host_buff, u32 dsp_addr,
- u32 ul_num_bytes, u32 ulMemType)
+ u32 ul_num_bytes, u32 mem_type)
{
int status = 0;
struct bridge_dev_context *dev_context = dev_ctxt;
dev_context->dw_internal_size)) {
status =
write_dsp_data(dev_ctxt, host_buff, dsp_addr,
- ul_bytes, ulMemType);
+ ul_bytes, mem_type);
} else {
status = write_ext_dsp_data(dev_ctxt, host_buff,
dsp_addr, ul_bytes,
- ulMemType, true);
+ mem_type, true);
}
ul_remain_bytes -= ul_bytes;
dsp_addr += ul_bytes;
* TODO: Disable MMU while updating the page tables (but that'll stall DSP)
*/
static int bridge_brd_mem_map(struct bridge_dev_context *dev_ctxt,
- u32 ul_mpu_addr, u32 ulVirtAddr,
+ u32 ul_mpu_addr, u32 virt_addr,
u32 ul_num_bytes, u32 ul_map_attr,
struct page **mapped_pages)
{
u32 num_usr_pgs = 0;
struct page *mapped_page, *pg;
s32 pg_num;
- u32 va = ulVirtAddr;
+ u32 va = virt_addr;
struct task_struct *curr_task = current;
u32 pg_i = 0;
u32 mpu_addr, pa;
dev_dbg(bridge,
"%s hDevCtxt %p, pa %x, va %x, size %x, ul_map_attr %x\n",
- __func__, dev_ctxt, ul_mpu_addr, ulVirtAddr, ul_num_bytes,
+ __func__, dev_ctxt, ul_mpu_addr, virt_addr, ul_num_bytes,
ul_map_attr);
if (ul_num_bytes == 0)
return -EINVAL;
hw_attrs.donotlockmpupage = 0;
if (attrs & DSP_MAPVMALLOCADDR) {
- return mem_map_vmalloc(dev_ctxt, ul_mpu_addr, ulVirtAddr,
+ return mem_map_vmalloc(dev_ctxt, ul_mpu_addr, virt_addr,
ul_num_bytes, &hw_attrs);
}
/*
* Pass the translated pa to pte_update.
*/
if ((attrs & DSP_MAPPHYSICALADDR)) {
- status = pte_update(dev_context, ul_mpu_addr, ulVirtAddr,
+ status = pte_update(dev_context, ul_mpu_addr, virt_addr,
ul_num_bytes, &hw_attrs);
goto func_cont;
}
* mapping
*/
if (pg_i) {
- bridge_brd_mem_un_map(dev_context, ulVirtAddr,
+ bridge_brd_mem_un_map(dev_context, virt_addr,
(pg_i * PG_SIZE4K));
}
status = -EPERM;
* we clear consecutive PTEs until we unmap all the bytes
*/
static int bridge_brd_mem_un_map(struct bridge_dev_context *dev_ctxt,
- u32 ulVirtAddr, u32 ul_num_bytes)
+ u32 virt_addr, u32 ul_num_bytes)
{
u32 l1_base_va;
u32 l2_base_va;
u32 paddr;
u32 numof4k_pages = 0;
- va_curr = ulVirtAddr;
+ va_curr = virt_addr;
rem_bytes = ul_num_bytes;
rem_bytes_l2 = 0;
l1_base_va = pt->l1_base_va;
pte_addr_l1 = hw_mmu_pte_addr_l1(l1_base_va, va_curr);
dev_dbg(bridge, "%s dev_ctxt %p, va %x, NumBytes %x l1_base_va %x, "
- "pte_addr_l1 %x\n", __func__, dev_ctxt, ulVirtAddr,
+ "pte_addr_l1 %x\n", __func__, dev_ctxt, virt_addr,
ul_num_bytes, l1_base_va, pte_addr_l1);
while (rem_bytes && (DSP_SUCCEEDED(status))) {
/* Memory map kernel VA -- memory allocated with vmalloc */
static int mem_map_vmalloc(struct bridge_dev_context *dev_context,
- u32 ul_mpu_addr, u32 ulVirtAddr,
+ u32 ul_mpu_addr, u32 virt_addr,
u32 ul_num_bytes,
struct hw_mmu_map_attrs_t *hw_attrs)
{
get_page(PHYS_TO_PAGE(pa));
pa += HW_PAGE_SIZE4KB;
}
- status = pte_update(dev_context, pa_curr, ulVirtAddr +
+ status = pte_update(dev_context, pa_curr, virt_addr +
(va_curr - ul_mpu_addr), size_curr,
hw_attrs);
va_curr += size_curr;
*/
int read_ext_dsp_data(struct bridge_dev_context *dev_ctxt,
OUT u8 *host_buff, u32 dsp_addr,
- u32 ul_num_bytes, u32 ulMemType)
+ u32 ul_num_bytes, u32 mem_type)
{
int status = 0;
struct bridge_dev_context *dev_context = dev_ctxt;
*/
int write_dsp_data(struct bridge_dev_context *dev_ctxt,
IN u8 *host_buff, u32 dsp_addr, u32 ul_num_bytes,
- u32 ulMemType)
+ u32 mem_type)
{
u32 offset;
u32 dw_base_addr = dev_ctxt->dw_dsp_base_addr;
*/
int write_ext_dsp_data(struct bridge_dev_context *dev_context,
IN u8 *host_buff, u32 dsp_addr,
- u32 ul_num_bytes, u32 ulMemType,
+ u32 ul_num_bytes, u32 mem_type,
bool dynamic_load)
{
u32 dw_base_addr = dev_context->dw_dsp_ext_base_addr;
*/
extern int read_ext_dsp_data(struct bridge_dev_context *dev_context,
OUT u8 *host_buff, u32 dsp_addr,
- u32 ul_num_bytes, u32 ulMemType);
+ u32 ul_num_bytes, u32 mem_type);
/*
* ======== write_dsp_data ========
*/
extern int write_dsp_data(struct bridge_dev_context *dev_context,
OUT u8 *host_buff, u32 dsp_addr,
- u32 ul_num_bytes, u32 ulMemType);
+ u32 ul_num_bytes, u32 mem_type);
/*
* ======== write_ext_dsp_data ========
*/
extern int write_ext_dsp_data(struct bridge_dev_context *dev_context,
IN u8 *host_buff, u32 dsp_addr,
- u32 ul_num_bytes, u32 ulMemType,
+ u32 ul_num_bytes, u32 mem_type,
bool dynamic_load);
/*
* Parameters:
* xlator: Handle to a Xlator object.
* va_buf: Virtual address ptr(client context)
- * uPaSize: Size of SM memory to allocate.
+ * pa_size: Size of SM memory to allocate.
* Returns:
- * Ptr to valid physical address(Pa) of uPaSize bytes, NULL if failed.
+ * Ptr to valid physical address(Pa) of pa_size bytes, NULL if failed.
* Requires:
* va_buf != 0.
- * uPaSize != 0.
+ * pa_size != 0.
* Ensures:
*
*/
extern void *cmm_xlator_alloc_buf(struct cmm_xlatorobject *xlator,
- void *va_buf, u32 uPaSize);
+ void *va_buf, u32 pa_size);
/*
* ======== cmm_xlator_create ========
* xlator: handle to translator.
* paddr: Virtual base address of segment.
* ul_size: Size in bytes.
- * uSegId: Segment identifier of SM segment(s)
+ * segm_id: Segment identifier of SM segment(s)
* set_info Set xlator fields if TRUE, else return base addr
* Returns:
* 0: Success.
*/
extern int cmm_xlator_info(struct cmm_xlatorobject *xlator,
IN OUT u8 **paddr,
- u32 ul_size, u32 uSegId, bool set_info);
+ u32 ul_size, u32 segm_id, bool set_info);
/*
* ======== cmm_xlator_translate ========
* Function prototypes for writing memory to a DSP system, allocating
* and freeing DSP memory.
*/
-typedef u32(*cod_writefxn) (void *priv_ref, u32 ulDspAddr,
+typedef u32(*cod_writefxn) (void *priv_ref, u32 dsp_add,
void *pbuf, u32 ul_num_bytes, u32 mem_space);
/*
* dsp_addr: Address on DSP board (Destination).
* host_buf: Pointer to host buffer (Source).
* ul_num_bytes: Number of bytes to transfer.
- * ulMemType: Memory space on DSP to which to transfer.
+ * mem_type: Memory space on DSP to which to transfer.
* Returns:
* Number of bytes written. Returns 0 if the DEV_hObject passed in via
* arb is invalid.
* Ensures:
*/
extern u32 dev_brd_write_fxn(void *arb,
- u32 ulDspAddr,
+ u32 dsp_add,
void *host_buf, u32 ul_num_bytes, u32 mem_space);
/*
* set up by a watchdog timer.
* Parameters:
* hdev_obj: Handle to device object created with dev_create_device().
- * ulStatus: A status word, most likely a BRD_STATUS.
+ * ret: A status word, most likely a BRD_STATUS.
* Returns:
* 0: All registered clients were asynchronously notified.
* -EINVAL: Invalid hdev_obj.
* delivered to clients. This function does not ensure that
* the notifications will ever be delivered.
*/
-extern int dev_notify_clients(struct dev_object *hdev_obj, u32 ulStatus);
+extern int dev_notify_clients(struct dev_object *hdev_obj, u32 ret);
/*
* ======== dev_remove_device ========
* Sets the Bridge driver state
* Parameters:
* dev_ctxt: Handle to Bridge driver defined device info.
- * ulBrdState: Board state
+ * brd_state: Board state
* Returns:
* 0: Success.
* -EPERM: Other, unspecified error.
* Requires:
* dev_ctxt != NULL;
- * ulBrdState <= BRD_LASTSTATE.
+ * brd_state <= BRD_LASTSTATE.
* Ensures:
- * ulBrdState <= BRD_LASTSTATE.
+ * brd_state <= BRD_LASTSTATE.
* Update the Board state to the specified state.
*/
typedef int(*fxn_brd_setstate) (struct bridge_dev_context
- * dev_ctxt, u32 ulBrdState);
+ * dev_ctxt, u32 brd_state);
/*
* ======== bridge_brd_start ========
* Copy memory from one DSP address to another
* Parameters:
* dev_context: Pointer to context handle
- * ulDspDestAddr: DSP address to copy to
- * ulDspSrcAddr: DSP address to copy from
+ * dsp_dest_addr: DSP address to copy to
+ * dsp_src_addr: DSP address to copy from
* ul_num_bytes: Number of bytes to copy
- * ulMemType: What section of memory to copy to
+ * mem_type: What section of memory to copy to
* Returns:
* 0: Success.
* -EPERM: Other, unspecified error.
*/
typedef int(*fxn_brd_memcopy) (struct bridge_dev_context
* dev_ctxt,
- u32 ulDspDestAddr,
- u32 ulDspSrcAddr,
- u32 ul_num_bytes, u32 ulMemType);
+ u32 dsp_dest_addr,
+ u32 dsp_src_addr,
+ u32 ul_num_bytes, u32 mem_type);
/*
* ======== bridge_brd_mem_write ========
* Purpose:
* dsp_addr: Address on DSP board (Destination).
* host_buf: Pointer to host buffer (Source).
* ul_num_bytes: Number of bytes to transfer.
- * ulMemType: Memory space on DSP to which to transfer.
+ * mem_type: Memory space on DSP to which to transfer.
* Returns:
* 0: Success.
* -ETIMEDOUT: Timeout occured waiting for a response from hardware.
* dev_ctxt,
IN u8 *host_buf,
u32 dsp_addr, u32 ul_num_bytes,
- u32 ulMemType);
+ u32 mem_type);
/*
* ======== bridge_brd_mem_map ========
* Parameters:
* dev_ctxt: Handle to Bridge driver defined device info.
* ul_mpu_addr: MPU memory region start address.
- * ulVirtAddr: DSP/IVA memory region u8 address.
+ * virt_addr: DSP/IVA memory region u8 address.
* ul_num_bytes: Number of bytes to map.
* map_attrs: Mapping attributes (e.g. endianness).
* Returns:
*/
typedef int(*fxn_brd_memmap) (struct bridge_dev_context
* dev_ctxt, u32 ul_mpu_addr,
- u32 ulVirtAddr, u32 ul_num_bytes,
- u32 ulMapAttrs,
+ u32 virt_addr, u32 ul_num_bytes,
+ u32 map_attr,
struct page **mapped_pages);
/*
* UnMap an MPU memory region from DSP/IVA memory space
* Parameters:
* dev_ctxt: Handle to Bridge driver defined device info.
- * ulVirtAddr: DSP/IVA memory region u8 address.
+ * virt_addr: DSP/IVA memory region u8 address.
* ul_num_bytes: Number of bytes to unmap.
* Returns:
* 0: Success.
*/
typedef int(*fxn_brd_memunmap) (struct bridge_dev_context
* dev_ctxt,
- u32 ulVirtAddr, u32 ul_num_bytes);
+ u32 virt_addr, u32 ul_num_bytes);
/*
* ======== bridge_brd_stop ========
* host_buf: Pointer to host buffer (Destination).
* dsp_addr: Address on DSP board (Source).
* ul_num_bytes: Number of bytes to transfer.
- * ulMemType: Memory space on DSP from which to transfer.
+ * mem_type: Memory space on DSP from which to transfer.
* Returns:
* 0: Success.
* -ETIMEDOUT: Timeout occured waiting for a response from hardware.
typedef int(*fxn_brd_read) (struct bridge_dev_context *dev_ctxt,
OUT u8 *host_buf,
u32 dsp_addr,
- u32 ul_num_bytes, u32 ulMemType);
+ u32 ul_num_bytes, u32 mem_type);
/*
* ======== bridge_brd_write ========
* dsp_addr: Address on DSP board (Destination).
* host_buf: Pointer to host buffer (Source).
* ul_num_bytes: Number of bytes to transfer.
- * ulMemType: Memory space on DSP to which to transfer.
+ * mem_type: Memory space on DSP to which to transfer.
* Returns:
* 0: Success.
* -ETIMEDOUT: Timeout occured waiting for a response from hardware.
typedef int(*fxn_brd_write) (struct bridge_dev_context *dev_ctxt,
IN u8 *host_buf,
u32 dsp_addr,
- u32 ul_num_bytes, u32 ulMemType);
+ u32 ul_num_bytes, u32 mem_type);
/*
* ======== bridge_chnl_create ========
* When notified of DSP error, take appropriate action.
* Parameters:
* hdeh_mgr: Handle to DEH manager object.
- * ulEventMask: Indicate the type of exception
+ * evnt_mask: Indicate the type of exception
* error_info: Error information
* Returns:
*
* Requires:
* hdeh_mgr != NULL;
- * ulEventMask with a valid exception
+ * evnt_mask with a valid exception
* Ensures:
*/
typedef void (*fxn_deh_notify) (struct deh_mgr *hdeh_mgr,
- u32 ulEventMask, u32 error_info);
+ u32 evnt_mask, u32 error_info);
/*
* ======== bridge_chnl_open ========
* Cancel IO on a given channel.
* Parameters:
* hio_mgr: IO Manager.
- * ulChnl: Index of channel to cancel IO on.
+ * chnl: Index of channel to cancel IO on.
* Returns:
* Requires:
* Valid hio_mgr.
* Ensures:
*/
-extern void io_cancel_chnl(struct io_mgr *hio_mgr, u32 ulChnl);
+extern void io_cancel_chnl(struct io_mgr *hio_mgr, u32 chnl);
/*
* ======== io_dpc ========
* Parameters:
* hio_mgr: Handle to a I/O manager.
* ddma_chnl_id: DDMA channel identifier.
- * uNumDesc: Number of buffer descriptors(equals # of IOReqs &
+ * num_desc: Number of buffer descriptors(equals # of IOReqs &
* Chirps)
* dsp: Dsp address;
* Returns:
* Requires:
* ddma_chnl_id < DDMA_MAXDDMACHNLS
- * uNumDesc > 0
+ * num_desc > 0
* pVa != NULL
* pDspPa != NULL
*
* Ensures:
*/
extern void io_ddma_init_chnl_desc(struct io_mgr *hio_mgr, u32 ddma_chnl_id,
- u32 uNumDesc, void *dsp);
+ u32 num_desc, void *dsp);
/*
* ======== io_ddma_clear_chnl_desc ========
* Initialize ZCPY channel descriptor.
* Parameters:
* hio_mgr: Handle to a I/O manager.
- * uZId: zero-copy channel identifier.
+ * zid: zero-copy channel identifier.
* Returns:
* Requires:
* ddma_chnl_id < DDMA_MAXZCPYCHNLS
* hio_mgr != Null
* Ensures:
*/
-extern void io_ddzc_init_chnl_desc(struct io_mgr *hio_mgr, u32 uZId);
+extern void io_ddzc_init_chnl_desc(struct io_mgr *hio_mgr, u32 zid);
/*
* ======== io_ddzc_clear_chnl_desc ========
*
* Parameters:
* priv_ref: Handle to identify the node.
- * ulDspRunAddr: Run address of code or data.
- * ulDspLoadAddr: Load address of code or data.
+ * dsp_run_addr: Run address of code or data.
+ * dsp_load_addr: Load address of code or data.
* ul_num_bytes: Number of (GPP) bytes to copy.
* mem_space: RMS_CODE or RMS_DATA.
* Returns:
* Requires:
* Ensures:
*/
-typedef u32(*nldr_ovlyfxn) (void *priv_ref, u32 ulDspRunAddr,
- u32 ulDspLoadAddr, u32 ul_num_bytes, u32 mem_space);
+typedef u32(*nldr_ovlyfxn) (void *priv_ref, u32 dsp_run_addr,
+ u32 dsp_load_addr, u32 ul_num_bytes, u32 mem_space);
/*
* ======== nldr_writefxn ========
* Write memory function. Used for dynamic load writes.
* Parameters:
* priv_ref: Handle to identify the node.
- * ulDspAddr: Address of code or data.
+ * dsp_add: Address of code or data.
* pbuf: Code or data to be written
* ul_num_bytes: Number of (GPP) bytes to write.
* mem_space: DBLL_DATA or DBLL_CODE.
* Ensures:
*/
typedef u32(*nldr_writefxn) (void *priv_ref,
- u32 ulDspAddr, void *pbuf,
+ u32 dsp_add, void *pbuf,
u32 ul_num_bytes, u32 mem_space);
/*
* if this is a connection from DSP node to GPP, or a
* node handle returned from a successful call to
* node_allocate().
- * uStream1: Output stream index on first node, to be connected
+ * stream1: Output stream index on first node, to be connected
* to second node's input stream. Value must range from
- * 0 <= uStream1 < number of output streams.
- * uStream2: Input stream index on second node. Value must range
- * from 0 <= uStream2 < number of input streams.
+ * 0 <= stream1 < number of output streams.
+ * stream2: Input stream index on second node. Value must range
+ * from 0 <= stream2 < number of input streams.
* pattrs: Stream attributes (NULL ==> use defaults).
* conn_param: A pointer to a dsp_cbdata structure that defines
* connection parameter for device nodes to pass to DSP
* -ENOMEM: Insufficient host memory.
* -EINVAL: A stream index parameter is invalid.
* -EISCONN: A connection already exists for one of the
- * indices uStream1 or uStream2.
+ * indices stream1 or stream2.
* -EBADR: Either node1 or node2 is not in the
* NODE_ALLOCATED state.
* -ECONNREFUSED: No more connections available.
* Ensures:
*/
extern int node_connect(struct node_object *node1,
- u32 uStream1,
+ u32 stream1,
struct node_object *node2,
- u32 uStream2,
+ u32 stream2,
OPTIONAL IN struct dsp_strmattr *pattrs,
OPTIONAL IN struct dsp_cbdata
*conn_param);
* ======== cmm_xlator_alloc_buf ========
*/
void *cmm_xlator_alloc_buf(struct cmm_xlatorobject *xlator, void *va_buf,
- u32 uPaSize)
+ u32 pa_size)
{
struct cmm_xlator *xlator_obj = (struct cmm_xlator *)xlator;
void *pbuf = NULL;
DBC_REQUIRE(xlator != NULL);
DBC_REQUIRE(xlator_obj->hcmm_mgr != NULL);
DBC_REQUIRE(va_buf != NULL);
- DBC_REQUIRE(uPaSize > 0);
+ DBC_REQUIRE(pa_size > 0);
DBC_REQUIRE(xlator_obj->ul_seg_id > 0);
if (xlator_obj) {
*(volatile u32 *)va_buf = 0;
/* Alloc SM */
pbuf =
- cmm_calloc_buf(xlator_obj->hcmm_mgr, uPaSize, &attrs, NULL);
+ cmm_calloc_buf(xlator_obj->hcmm_mgr, pa_size, &attrs, NULL);
if (pbuf) {
/* convert to translator(node/strm) process Virtual
* address */
* Set/Get translator info.
*/
int cmm_xlator_info(struct cmm_xlatorobject *xlator, IN OUT u8 ** paddr,
- u32 ul_size, u32 uSegId, bool set_info)
+ u32 ul_size, u32 segm_id, bool set_info)
{
struct cmm_xlator *xlator_obj = (struct cmm_xlator *)xlator;
int status = 0;
DBC_REQUIRE(refs > 0);
DBC_REQUIRE(paddr != NULL);
- DBC_REQUIRE((uSegId > 0) && (uSegId <= CMM_MAXGPPSEGS));
+ DBC_REQUIRE((segm_id > 0) && (segm_id <= CMM_MAXGPPSEGS));
if (xlator_obj) {
if (set_info) {
* is passed a handle to a DEV_hObject, then calls the
* device's bridge_brd_write() function.
*/
-u32 dev_brd_write_fxn(void *arb, u32 ulDspAddr, void *host_buf,
+u32 dev_brd_write_fxn(void *arb, u32 dsp_add, void *host_buf,
u32 ul_num_bytes, u32 mem_space)
{
struct dev_object *dev_obj = (struct dev_object *)arb;
DBC_ASSERT(dev_obj->hbridge_context != NULL);
status = (*dev_obj->bridge_interface.pfn_brd_write) (
dev_obj->hbridge_context, host_buf,
- ulDspAddr, ul_num_bytes, mem_space);
+ dsp_add, ul_num_bytes, mem_space);
/* Special case of getting the address only */
if (ul_num_bytes == 0)
ul_num_bytes = 1;
* Purpose:
* Notify all clients of this device of a change in device status.
*/
-int dev_notify_clients(struct dev_object *hdev_obj, u32 ulStatus)
+int dev_notify_clients(struct dev_object *hdev_obj, u32 ret)
{
int status = 0;
proc_obj != NULL;
proc_obj = (void *)lst_next(dev_obj->proc_list,
(struct list_head *)proc_obj))
- proc_notify_clients(proc_obj, (u32) ulStatus);
+ proc_notify_clients(proc_obj, (u32) ret);
return status;
}
*/
int disp_node_change_priority(struct disp_object *disp_obj,
struct node_object *hnode,
- u32 ulRMSFxn, nodeenv node_env, s32 prio)
+ u32 rms_fxn, nodeenv node_env, s32 prio)
{
u32 dw_arg;
struct rms_command *rms_cmd;
/* Send message to RMS to change priority */
rms_cmd = (struct rms_command *)(disp_obj->pbuf);
- rms_cmd->fxn = (rms_word) (ulRMSFxn);
+ rms_cmd->fxn = (rms_word) (rms_fxn);
rms_cmd->arg1 = (rms_word) node_env;
rms_cmd->arg2 = prio;
status = send_message(disp_obj, node_get_timeout(hnode),
* Create a node on the DSP by remotely calling the node's create function.
*/
int disp_node_create(struct disp_object *disp_obj,
- struct node_object *hnode, u32 ulRMSFxn,
+ struct node_object *hnode, u32 rms_fxn,
u32 ul_create_fxn,
IN CONST struct node_createargs *pargs,
OUT nodeenv *node_env)
total = 0; /* Total number of words in buffer so far */
pdw_buf = (rms_word *) disp_obj->pbuf;
rms_cmd = (struct rms_command *)pdw_buf;
- rms_cmd->fxn = (rms_word) (ulRMSFxn);
+ rms_cmd->fxn = (rms_word) (rms_fxn);
rms_cmd->arg1 = (rms_word) (ul_create_fxn);
if (node_get_load_type(hnode) == NLDR_DYNAMICLOAD) {
/* Flush ICACHE on Load */
*
*/
int disp_node_delete(struct disp_object *disp_obj,
- struct node_object *hnode, u32 ulRMSFxn,
+ struct node_object *hnode, u32 rms_fxn,
u32 ul_delete_fxn, nodeenv node_env)
{
u32 dw_arg;
* Fill in buffer to send to RMS
*/
rms_cmd = (struct rms_command *)disp_obj->pbuf;
- rms_cmd->fxn = (rms_word) (ulRMSFxn);
+ rms_cmd->fxn = (rms_word) (rms_fxn);
rms_cmd->arg1 = (rms_word) node_env;
rms_cmd->arg2 = (rms_word) (ul_delete_fxn);
rms_cmd->data = node_get_type(hnode);
* that has been suspended (via DISP_NodePause()) on the DSP.
*/
int disp_node_run(struct disp_object *disp_obj,
- struct node_object *hnode, u32 ulRMSFxn,
+ struct node_object *hnode, u32 rms_fxn,
u32 ul_execute_fxn, nodeenv node_env)
{
u32 dw_arg;
* Fill in buffer to send to RMS.
*/
rms_cmd = (struct rms_command *)disp_obj->pbuf;
- rms_cmd->fxn = (rms_word) (ulRMSFxn);
+ rms_cmd->fxn = (rms_word) (rms_fxn);
rms_cmd->arg1 = (rms_word) node_env;
rms_cmd->arg2 = (rms_word) (ul_execute_fxn);
rms_cmd->data = node_get_type(hnode);
struct process_context *pr_ctxt);
static void delete_node_mgr(struct node_mgr *hnode_mgr);
static void fill_stream_connect(struct node_object *node1,
- struct node_object *node2, u32 uStream1,
- u32 uStream2);
+ struct node_object *node2, u32 stream1,
+ u32 stream2);
static void fill_stream_def(struct node_object *hnode,
struct node_strmdef *pstrm_def,
struct dsp_strmattr *pattrs);
static void free_stream(struct node_mgr *hnode_mgr, struct stream_chnl stream);
static int get_fxn_address(struct node_object *hnode, u32 * fxn_addr,
- u32 uPhase);
+ u32 phase);
static int get_node_props(struct dcd_manager *hdcd_mgr,
struct node_object *hnode,
CONST struct dsp_uuid *node_uuid,
static int get_proc_props(struct node_mgr *hnode_mgr,
struct dev_object *hdev_obj);
static int get_rms_fxns(struct node_mgr *hnode_mgr);
-static u32 ovly(void *priv_ref, u32 ulDspRunAddr, u32 ulDspLoadAddr,
+static u32 ovly(void *priv_ref, u32 dsp_run_addr, u32 dsp_load_addr,
u32 ul_num_bytes, u32 mem_space);
-static u32 mem_write(void *priv_ref, u32 ulDspAddr, void *pbuf,
+static u32 mem_write(void *priv_ref, u32 dsp_add, void *pbuf,
u32 ul_num_bytes, u32 mem_space);
static u32 refs; /* module reference count */
* Purpose:
* Connect two nodes on the DSP, or a node on the DSP to the GPP.
*/
-int node_connect(struct node_object *node1, u32 uStream1,
+int node_connect(struct node_object *node1, u32 stream1,
struct node_object *node2,
- u32 uStream2, OPTIONAL IN struct dsp_strmattr *pattrs,
+ u32 stream2, OPTIONAL IN struct dsp_strmattr *pattrs,
OPTIONAL IN struct dsp_cbdata *conn_param)
{
struct node_mgr *hnode_mgr;
node2_type = node_get_type(node2);
/* Check stream indices ranges */
if ((node1_type != NODE_GPP && node1_type != NODE_DEVICE &&
- uStream1 >= MAX_OUTPUTS(node1)) || (node2_type != NODE_GPP
+ stream1 >= MAX_OUTPUTS(node1)) || (node2_type != NODE_GPP
&& node2_type !=
NODE_DEVICE
- && uStream2 >=
+ && stream2 >=
MAX_INPUTS(node2)))
status = -EINVAL;
}
if (node1_type == NODE_TASK || node1_type == NODE_DAISSOCKET) {
output =
&(node1->create_args.asa.
- task_arg_obj.strm_out_def[uStream1]);
+ task_arg_obj.strm_out_def[stream1]);
if (output->sz_device != NULL)
status = -EISCONN;
if (node2_type == NODE_TASK || node2_type == NODE_DAISSOCKET) {
input =
&(node2->create_args.asa.
- task_arg_obj.strm_in_def[uStream2]);
+ task_arg_obj.strm_in_def[stream2]);
if (input->sz_device != NULL)
status = -EISCONN;
if (pipe_id == GB_NOBITS) {
status = -ECONNREFUSED;
} else {
- node1->outputs[uStream1].type = NODECONNECT;
- node2->inputs[uStream2].type = NODECONNECT;
- node1->outputs[uStream1].dev_id = pipe_id;
- node2->inputs[uStream2].dev_id = pipe_id;
+ node1->outputs[stream1].type = NODECONNECT;
+ node2->inputs[stream2].type = NODECONNECT;
+ node1->outputs[stream1].dev_id = pipe_id;
+ node2->inputs[stream2].dev_id = pipe_id;
output->sz_device = kzalloc(PIPENAMELEN + 1,
GFP_KERNEL);
input->sz_device = kzalloc(PIPENAMELEN + 1, GFP_KERNEL);
func_cont2:
if (DSP_SUCCEEDED(status)) {
if (node1 == (struct node_object *)DSP_HGPPNODE) {
- node2->inputs[uStream2].type = HOSTCONNECT;
- node2->inputs[uStream2].dev_id = chnl_id;
+ node2->inputs[stream2].type = HOSTCONNECT;
+ node2->inputs[stream2].dev_id = chnl_id;
input->sz_device = pstr_dev_name;
} else {
- node1->outputs[uStream1].type = HOSTCONNECT;
- node1->outputs[uStream1].dev_id = chnl_id;
+ node1->outputs[stream1].type = HOSTCONNECT;
+ node1->outputs[stream1].dev_id = chnl_id;
output->sz_device = pstr_dev_name;
}
sprintf(pstr_dev_name, "%s%d", HOSTPREFIX, chnl_id);
/* node1 == > device */
dev_node_obj = node2;
hnode = node1;
- pstream = &(node1->outputs[uStream1]);
+ pstream = &(node1->outputs[stream1]);
pstrm_def = output;
} else {
/* device == > node2 */
dev_node_obj = node1;
hnode = node2;
- pstream = &(node2->inputs[uStream2]);
+ pstream = &(node2->inputs[stream2]);
pstrm_def = input;
}
/* Set up create args */
/* Update node1 and node2 stream_connect */
if (node1_type != NODE_GPP && node1_type != NODE_DEVICE) {
node1->num_outputs++;
- if (uStream1 > node1->max_output_index)
- node1->max_output_index = uStream1;
+ if (stream1 > node1->max_output_index)
+ node1->max_output_index = stream1;
}
if (node2_type != NODE_GPP && node2_type != NODE_DEVICE) {
node2->num_inputs++;
- if (uStream2 > node2->max_input_index)
- node2->max_input_index = uStream2;
+ if (stream2 > node2->max_input_index)
+ node2->max_input_index = stream2;
}
- fill_stream_connect(node1, node2, uStream1, uStream2);
+ fill_stream_connect(node1, node2, stream1, stream2);
}
/* end of sync_enter_cs */
/* Exit critical section */
mutex_unlock(&hnode_mgr->node_mgr_lock);
func_end:
- dev_dbg(bridge, "%s: node1: %p uStream1: %d node2: %p uStream2: %d"
+ dev_dbg(bridge, "%s: node1: %p stream1: %d node2: %p stream2: %d"
"pattrs: %p status: 0x%x\n", __func__, node1,
- uStream1, node2, uStream2, pattrs, status);
+ stream1, node2, stream2, pattrs, status);
return status;
}
*/
static void fill_stream_connect(struct node_object *node1,
struct node_object *node2,
- u32 uStream1, u32 uStream2)
+ u32 stream1, u32 stream2)
{
u32 strm_index;
struct dsp_streamconnect *strm1 = NULL;
node1->num_outputs - 1;
strm1 = &(node1->stream_connect[strm_index]);
strm1->cb_struct = sizeof(struct dsp_streamconnect);
- strm1->this_node_stream_index = uStream1;
+ strm1->this_node_stream_index = stream1;
}
if (node2 != (struct node_object *)DSP_HGPPNODE) {
if (node1_type != NODE_DEVICE) {
strm1->connected_node = node2;
strm1->ui_connected_node_id = node2->node_uuid;
- strm1->connected_node_stream_index = uStream2;
+ strm1->connected_node_stream_index = stream2;
strm1->connect_type = CONNECTTYPE_NODEOUTPUT;
}
if (node2_type != NODE_DEVICE) {
strm2 = &(node2->stream_connect[strm_index]);
strm2->cb_struct =
sizeof(struct dsp_streamconnect);
- strm2->this_node_stream_index = uStream2;
+ strm2->this_node_stream_index = stream2;
strm2->connected_node = node1;
strm2->ui_connected_node_id = node1->node_uuid;
- strm2->connected_node_stream_index = uStream1;
+ strm2->connected_node_stream_index = stream1;
strm2->connect_type = CONNECTTYPE_NODEINPUT;
}
} else if (node1_type != NODE_DEVICE)
strm_index = node2->num_inputs + node2->num_outputs - 1;
strm2 = &(node2->stream_connect[strm_index]);
strm2->cb_struct = sizeof(struct dsp_streamconnect);
- strm2->this_node_stream_index = uStream2;
+ strm2->this_node_stream_index = stream2;
strm2->connect_type = CONNECTTYPE_GPPINPUT;
}
}
* Retrieves the address for create, execute or delete phase for a node.
*/
static int get_fxn_address(struct node_object *hnode, u32 * fxn_addr,
- u32 uPhase)
+ u32 phase)
{
char *pstr_fxn_name = NULL;
struct node_mgr *hnode_mgr = hnode->hnode_mgr;
node_get_type(hnode) == NODE_DAISSOCKET ||
node_get_type(hnode) == NODE_MESSAGE);
- switch (uPhase) {
+ switch (phase) {
case CREATEPHASE:
pstr_fxn_name =
hnode->dcd_props.obj_data.node_obj.pstr_create_phase_fxn;
* Purpose:
* Called during overlay.Sends command to RMS to copy a block of data.
*/
-static u32 ovly(void *priv_ref, u32 ulDspRunAddr, u32 ulDspLoadAddr,
+static u32 ovly(void *priv_ref, u32 dsp_run_addr, u32 dsp_load_addr,
u32 ul_num_bytes, u32 mem_space)
{
struct node_object *hnode = (struct node_object *)priv_ref;
if (DSP_SUCCEEDED(status)) {
status =
(*intf_fxns->pfn_brd_mem_copy) (hbridge_context,
- ulDspRunAddr, ulDspLoadAddr,
+ dsp_run_addr, dsp_load_addr,
ul_num_bytes, (u32) mem_space);
if (DSP_SUCCEEDED(status))
ul_bytes = ul_num_bytes;
/*
* ======== mem_write ========
*/
-static u32 mem_write(void *priv_ref, u32 ulDspAddr, void *pbuf,
+static u32 mem_write(void *priv_ref, u32 dsp_add, void *pbuf,
u32 ul_num_bytes, u32 mem_space)
{
struct node_object *hnode = (struct node_object *)priv_ref;
intf_fxns = hnode_mgr->intf_fxns;
status = dev_get_bridge_context(hnode_mgr->hdev_obj, &hbridge_context);
status = (*intf_fxns->pfn_brd_mem_write) (hbridge_context, pbuf,
- ulDspAddr, ul_num_bytes, mem_sect_type);
+ dsp_add, ul_num_bytes, mem_sect_type);
return ul_num_bytes;
}
projects / GitHub / moto-9609 / android_kernel_motorola_exynos9610.git / commitdiff