ARM: EXYNOS: Support Suspend/Resume for EXYNOS4412

This patch provides the suspend/resume support for EXYNOS4412.

Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h
index 4c53f38b5a9e962f2c81bdedf726cee5dbe4017d..606b19907f99d635bc1e5a30d90dfca85b51bed8 100644 (file)
--- a/arch/arm/mach-exynos/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h
@@ -177,7 +177,7 @@
 
 #define S5P_PMU_LCD1_CONF              S5P_PMUREG(0x3CA0)
 
-/* Only for EXYNOS4212 */
+/* Only for EXYNOS4x12 */
 #define S5P_ISP_ARM_LOWPWR                     S5P_PMUREG(0x1050)
 #define S5P_DIS_IRQ_ISP_ARM_LOCAL_LOWPWR       S5P_PMUREG(0x1054)
 #define S5P_DIS_IRQ_ISP_ARM_CENTRAL_LOWPWR     S5P_PMUREG(0x1058)
@@ -218,4 +218,12 @@
 #define S5P_SECSS_MEM_OPTION                   S5P_PMUREG(0x2EC8)
 #define S5P_ROTATOR_MEM_OPTION                 S5P_PMUREG(0x2F48)
 
+/* Only for EXYNOS4412 */
+#define S5P_ARM_CORE2_LOWPWR                   S5P_PMUREG(0x1020)
+#define S5P_DIS_IRQ_CORE2                      S5P_PMUREG(0x1024)
+#define S5P_DIS_IRQ_CENTRAL2                   S5P_PMUREG(0x1028)
+#define S5P_ARM_CORE3_LOWPWR                   S5P_PMUREG(0x1030)
+#define S5P_DIS_IRQ_CORE3                      S5P_PMUREG(0x1034)
+#define S5P_DIS_IRQ_CENTRAL3                   S5P_PMUREG(0x1038)
+
 #endif /* __ASM_ARCH_REGS_PMU_H */

diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 428cfeb577248a5e812e7c954b8faa7584bbbe3a..f0bb4677eb11674eb5faeceff380c0f8b53ff5a1 100644 (file)
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -313,7 +313,7 @@ static int exynos4_pm_suspend(void)
        tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
        __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
 
-       if (soc_is_exynos4212()) {
+       if (soc_is_exynos4212() || soc_is_exynos4412()) {
                tmp = __raw_readl(S5P_CENTRAL_SEQ_OPTION);
                tmp &= ~(S5P_USE_STANDBYWFI_ISP_ARM |
                         S5P_USE_STANDBYWFE_ISP_ARM);

diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index bba48f5c3e8fe21a6d2218949d929ee4e5b08d8a..77c6815eebeea9c6070ccab7474f5282368b037e 100644 (file)
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -94,7 +94,7 @@ static struct exynos4_pmu_conf exynos4210_pmu_config[] = {
        { PMU_TABLE_END,},
 };
 
-static struct exynos4_pmu_conf exynos4212_pmu_config[] = {
+static struct exynos4_pmu_conf exynos4x12_pmu_config[] = {
        { S5P_ARM_CORE0_LOWPWR,                 { 0x0, 0x0, 0x2 } },
        { S5P_DIS_IRQ_CORE0,                    { 0x0, 0x0, 0x0 } },
        { S5P_DIS_IRQ_CENTRAL0,                 { 0x0, 0x0, 0x0 } },
@@ -202,6 +202,16 @@ static struct exynos4_pmu_conf exynos4212_pmu_config[] = {
        { PMU_TABLE_END,},
 };
 
+static struct exynos4_pmu_conf exynos4412_pmu_config[] = {
+       { S5P_ARM_CORE2_LOWPWR,                 { 0x0, 0x0, 0x2 } },
+       { S5P_DIS_IRQ_CORE2,                    { 0x0, 0x0, 0x0 } },
+       { S5P_DIS_IRQ_CENTRAL2,                 { 0x0, 0x0, 0x0 } },
+       { S5P_ARM_CORE3_LOWPWR,                 { 0x0, 0x0, 0x2 } },
+       { S5P_DIS_IRQ_CORE3,                    { 0x0, 0x0, 0x0 } },
+       { S5P_DIS_IRQ_CENTRAL3,                 { 0x0, 0x0, 0x0 } },
+       { PMU_TABLE_END,},
+};
+
 void exynos4_sys_powerdown_conf(enum sys_powerdown mode)
 {
        unsigned int i;
@@ -209,6 +219,12 @@ void exynos4_sys_powerdown_conf(enum sys_powerdown mode)
        for (i = 0; (exynos4_pmu_config[i].reg != PMU_TABLE_END) ; i++)
                __raw_writel(exynos4_pmu_config[i].val[mode],
                                exynos4_pmu_config[i].reg);
+
+       if (soc_is_exynos4412()) {
+               for (i = 0; exynos4412_pmu_config[i].reg != PMU_TABLE_END ; i++)
+                       __raw_writel(exynos4412_pmu_config[i].val[mode],
+                               exynos4412_pmu_config[i].reg);
+       }
 }
 
 static int __init exynos4_pmu_init(void)
@@ -218,9 +234,9 @@ static int __init exynos4_pmu_init(void)
        if (soc_is_exynos4210()) {
                exynos4_pmu_config = exynos4210_pmu_config;
                pr_info("EXYNOS4210 PMU Initialize\n");
-       } else if (soc_is_exynos4212()) {
-               exynos4_pmu_config = exynos4212_pmu_config;
-               pr_info("EXYNOS4212 PMU Initialize\n");
+       } else if (soc_is_exynos4212() || soc_is_exynos4412()) {
+               exynos4_pmu_config = exynos4x12_pmu_config;
+               pr_info("EXYNOS4x12 PMU Initialize\n");
        } else {
                pr_info("EXYNOS4: PMU not supported\n");
        }