KVM: PPC: booke: add sregs support
authorScott Wood <scottwood@freescale.com>
Wed, 27 Apr 2011 22:24:21 +0000 (17:24 -0500)
committerAvi Kivity <avi@redhat.com>
Sun, 22 May 2011 12:47:53 +0000 (08:47 -0400)
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
14 files changed:
Documentation/kvm/api.txt
arch/powerpc/include/asm/kvm.h
arch/powerpc/include/asm/kvm_44x.h
arch/powerpc/include/asm/kvm_e500.h
arch/powerpc/include/asm/kvm_host.h
arch/powerpc/include/asm/kvm_ppc.h
arch/powerpc/kvm/44x.c
arch/powerpc/kvm/booke.c
arch/powerpc/kvm/e500.c
arch/powerpc/kvm/e500_emulate.c
arch/powerpc/kvm/e500_tlb.c
arch/powerpc/kvm/emulate.c
arch/powerpc/kvm/powerpc.c
include/linux/kvm.h

index 1b9eaa7e8856f3d1d023d4308a0ece0bc7f9871c..f64c41f8ba61746d2bad6b15ee6f01d319a84b18 100644 (file)
@@ -261,7 +261,7 @@ See KVM_GET_REGS for the data structure.
 4.13 KVM_GET_SREGS
 
 Capability: basic
-Architectures: x86
+Architectures: x86, ppc
 Type: vcpu ioctl
 Parameters: struct kvm_sregs (out)
 Returns: 0 on success, -1 on error
@@ -279,6 +279,8 @@ struct kvm_sregs {
        __u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
 };
 
+/* ppc -- see arch/powerpc/include/asm/kvm.h */
+
 interrupt_bitmap is a bitmap of pending external interrupts.  At most
 one bit may be set.  This interrupt has been acknowledged by the APIC
 but not yet injected into the cpu core.
@@ -286,7 +288,7 @@ but not yet injected into the cpu core.
 4.14 KVM_SET_SREGS
 
 Capability: basic
-Architectures: x86
+Architectures: x86, ppc
 Type: vcpu ioctl
 Parameters: struct kvm_sregs (in)
 Returns: 0 on success, -1 on error
index 18ea6963ad7723e1478f290c17a334ee15e898f3..d2ca5ed3877b266b1936ef2839636a2f368e16b2 100644 (file)
@@ -45,6 +45,114 @@ struct kvm_regs {
        __u64 gpr[32];
 };
 
+#define KVM_SREGS_E_IMPL_NONE  0
+#define KVM_SREGS_E_IMPL_FSL   1
+
+#define KVM_SREGS_E_FSL_PIDn   (1 << 0) /* PID1/PID2 */
+
+/*
+ * Feature bits indicate which sections of the sregs struct are valid,
+ * both in KVM_GET_SREGS and KVM_SET_SREGS.  On KVM_SET_SREGS, registers
+ * corresponding to unset feature bits will not be modified.  This allows
+ * restoring a checkpoint made without that feature, while keeping the
+ * default values of the new registers.
+ *
+ * KVM_SREGS_E_BASE contains:
+ * CSRR0/1 (refers to SRR2/3 on 40x)
+ * ESR
+ * DEAR
+ * MCSR
+ * TSR
+ * TCR
+ * DEC
+ * TB
+ * VRSAVE (USPRG0)
+ */
+#define KVM_SREGS_E_BASE               (1 << 0)
+
+/*
+ * KVM_SREGS_E_ARCH206 contains:
+ *
+ * PIR
+ * MCSRR0/1
+ * DECAR
+ * IVPR
+ */
+#define KVM_SREGS_E_ARCH206            (1 << 1)
+
+/*
+ * Contains EPCR, plus the upper half of 64-bit registers
+ * that are 32-bit on 32-bit implementations.
+ */
+#define KVM_SREGS_E_64                 (1 << 2)
+
+#define KVM_SREGS_E_SPRG8              (1 << 3)
+#define KVM_SREGS_E_MCIVPR             (1 << 4)
+
+/*
+ * IVORs are used -- contains IVOR0-15, plus additional IVORs
+ * in combination with an appropriate feature bit.
+ */
+#define KVM_SREGS_E_IVOR               (1 << 5)
+
+/*
+ * Contains MAS0-4, MAS6-7, TLBnCFG, MMUCFG.
+ * Also TLBnPS if MMUCFG[MAVN] = 1.
+ */
+#define KVM_SREGS_E_ARCH206_MMU                (1 << 6)
+
+/* DBSR, DBCR, IAC, DAC, DVC */
+#define KVM_SREGS_E_DEBUG              (1 << 7)
+
+/* Enhanced debug -- DSRR0/1, SPRG9 */
+#define KVM_SREGS_E_ED                 (1 << 8)
+
+/* Embedded Floating Point (SPE) -- IVOR32-34 if KVM_SREGS_E_IVOR */
+#define KVM_SREGS_E_SPE                        (1 << 9)
+
+/* External Proxy (EXP) -- EPR */
+#define KVM_SREGS_EXP                  (1 << 10)
+
+/* External PID (E.PD) -- EPSC/EPLC */
+#define KVM_SREGS_E_PD                 (1 << 11)
+
+/* Processor Control (E.PC) -- IVOR36-37 if KVM_SREGS_E_IVOR */
+#define KVM_SREGS_E_PC                 (1 << 12)
+
+/* Page table (E.PT) -- EPTCFG */
+#define KVM_SREGS_E_PT                 (1 << 13)
+
+/* Embedded Performance Monitor (E.PM) -- IVOR35 if KVM_SREGS_E_IVOR */
+#define KVM_SREGS_E_PM                 (1 << 14)
+
+/*
+ * Special updates:
+ *
+ * Some registers may change even while a vcpu is not running.
+ * To avoid losing these changes, by default these registers are
+ * not updated by KVM_SET_SREGS.  To force an update, set the bit
+ * in u.e.update_special corresponding to the register to be updated.
+ *
+ * The update_special field is zero on return from KVM_GET_SREGS.
+ *
+ * When restoring a checkpoint, the caller can set update_special
+ * to 0xffffffff to ensure that everything is restored, even new features
+ * that the caller doesn't know about.
+ */
+#define KVM_SREGS_E_UPDATE_MCSR                (1 << 0)
+#define KVM_SREGS_E_UPDATE_TSR         (1 << 1)
+#define KVM_SREGS_E_UPDATE_DEC         (1 << 2)
+#define KVM_SREGS_E_UPDATE_DBSR                (1 << 3)
+
+/*
+ * In KVM_SET_SREGS, reserved/pad fields must be left untouched from a
+ * previous KVM_GET_REGS.
+ *
+ * Unless otherwise indicated, setting any register with KVM_SET_SREGS
+ * directly sets its value.  It does not trigger any special semantics such
+ * as write-one-to-clear.  Calling KVM_SET_SREGS on an unmodified struct
+ * just received from KVM_GET_SREGS is always a no-op.
+ */
 struct kvm_sregs {
        __u32 pvr;
        union {
@@ -62,6 +170,82 @@ struct kvm_sregs {
                                __u64 dbat[8]; 
                        } ppc32;
                } s;
+               struct {
+                       union {
+                               struct { /* KVM_SREGS_E_IMPL_FSL */
+                                       __u32 features; /* KVM_SREGS_E_FSL_ */
+                                       __u32 svr;
+                                       __u64 mcar;
+                                       __u32 hid0;
+
+                                       /* KVM_SREGS_E_FSL_PIDn */
+                                       __u32 pid1, pid2;
+                               } fsl;
+                               __u8 pad[256];
+                       } impl;
+
+                       __u32 features; /* KVM_SREGS_E_ */
+                       __u32 impl_id;  /* KVM_SREGS_E_IMPL_ */
+                       __u32 update_special; /* KVM_SREGS_E_UPDATE_ */
+                       __u32 pir;      /* read-only */
+                       __u64 sprg8;
+                       __u64 sprg9;    /* E.ED */
+                       __u64 csrr0;
+                       __u64 dsrr0;    /* E.ED */
+                       __u64 mcsrr0;
+                       __u32 csrr1;
+                       __u32 dsrr1;    /* E.ED */
+                       __u32 mcsrr1;
+                       __u32 esr;
+                       __u64 dear;
+                       __u64 ivpr;
+                       __u64 mcivpr;
+                       __u64 mcsr;     /* KVM_SREGS_E_UPDATE_MCSR */
+
+                       __u32 tsr;      /* KVM_SREGS_E_UPDATE_TSR */
+                       __u32 tcr;
+                       __u32 decar;
+                       __u32 dec;      /* KVM_SREGS_E_UPDATE_DEC */
+
+                       /*
+                        * Userspace can read TB directly, but the
+                        * value reported here is consistent with "dec".
+                        *
+                        * Read-only.
+                        */
+                       __u64 tb;
+
+                       __u32 dbsr;     /* KVM_SREGS_E_UPDATE_DBSR */
+                       __u32 dbcr[3];
+                       __u32 iac[4];
+                       __u32 dac[2];
+                       __u32 dvc[2];
+                       __u8 num_iac;   /* read-only */
+                       __u8 num_dac;   /* read-only */
+                       __u8 num_dvc;   /* read-only */
+                       __u8 pad;
+
+                       __u32 epr;      /* EXP */
+                       __u32 vrsave;   /* a.k.a. USPRG0 */
+                       __u32 epcr;     /* KVM_SREGS_E_64 */
+
+                       __u32 mas0;
+                       __u32 mas1;
+                       __u64 mas2;
+                       __u64 mas7_3;
+                       __u32 mas4;
+                       __u32 mas6;
+
+                       __u32 ivor_low[16]; /* IVOR0-15 */
+                       __u32 ivor_high[18]; /* IVOR32+, plus room to expand */
+
+                       __u32 mmucfg;   /* read-only */
+                       __u32 eptcfg;   /* E.PT, read-only */
+                       __u32 tlbcfg[4];/* read-only */
+                       __u32 tlbps[4]; /* read-only */
+
+                       __u32 eplc, epsc; /* E.PD */
+               } e;
                __u8 pad[1020];
        } u;
 };
index d22d39942a926fa05874557af866d04079f4aebe..a0e57618ff33d87b2bb2d78dfe46e0bf6f577bcf 100644 (file)
@@ -61,7 +61,6 @@ static inline struct kvmppc_vcpu_44x *to_44x(struct kvm_vcpu *vcpu)
        return container_of(vcpu, struct kvmppc_vcpu_44x, vcpu);
 }
 
-void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 new_pid);
 void kvmppc_44x_tlb_put(struct kvm_vcpu *vcpu);
 void kvmppc_44x_tlb_load(struct kvm_vcpu *vcpu);
 
index bb2a0890600f227b6109f5281776d8548e9da8ca..7a2a565f88c4bf8240d371c3e8615d1724765b5e 100644 (file)
@@ -59,6 +59,7 @@ struct kvmppc_vcpu_e500 {
        u32 hid1;
        u32 tlb0cfg;
        u32 tlb1cfg;
+       u64 mcar;
 
        struct kvm_vcpu vcpu;
 };
index a1680439916539955f5393fc6f85260142853a8e..186f150b9b8970ed217661721b5132f2f9622c59 100644 (file)
@@ -233,6 +233,9 @@ struct kvm_vcpu_arch {
        ulong csrr1;
        ulong dsrr0;
        ulong dsrr1;
+       ulong mcsrr0;
+       ulong mcsrr1;
+       ulong mcsr;
        ulong esr;
        u32 dec;
        u32 decar;
index ecb3bc74c3440e6e7a21efd53ac5cc49c7a1a18b..9345238edecfcd03d3aa6dfa0ddb8806294630e8 100644 (file)
@@ -61,6 +61,7 @@ extern int kvmppc_emulate_instruction(struct kvm_run *run,
                                       struct kvm_vcpu *vcpu);
 extern int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu);
 extern void kvmppc_emulate_dec(struct kvm_vcpu *vcpu);
+extern u32 kvmppc_get_dec(struct kvm_vcpu *vcpu, u64 tb);
 
 /* Core-specific hooks */
 
@@ -142,4 +143,12 @@ static inline u32 kvmppc_set_field(u64 inst, int msb, int lsb, int value)
        return r;
 }
 
+void kvmppc_core_get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
+int kvmppc_core_set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
+
+void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
+int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
+
+void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid);
+
 #endif /* __POWERPC_KVM_PPC_H__ */
index 74d0e742114306af2db5400af6c3ec29fe6a8c6d..da3a1225c0ac10117918f105799f8d60b20665ce 100644 (file)
@@ -107,6 +107,16 @@ int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,
        return 0;
 }
 
+void kvmppc_core_get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
+{
+       kvmppc_get_sregs_ivor(vcpu, sregs);
+}
+
+int kvmppc_core_set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
+{
+       return kvmppc_set_sregs_ivor(vcpu, sregs);
+}
+
 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
 {
        struct kvmppc_vcpu_44x *vcpu_44x;
index ef76acb455c310bb441326d59e2cfe2527fe82e6..8462b3a1c1c7501632fc08585c7be028d8eb6601 100644 (file)
@@ -569,6 +569,7 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
        kvmppc_set_msr(vcpu, regs->msr);
        vcpu->arch.shared->srr0 = regs->srr0;
        vcpu->arch.shared->srr1 = regs->srr1;
+       kvmppc_set_pid(vcpu, regs->pid);
        vcpu->arch.shared->sprg0 = regs->sprg0;
        vcpu->arch.shared->sprg1 = regs->sprg1;
        vcpu->arch.shared->sprg2 = regs->sprg2;
@@ -584,16 +585,165 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
        return 0;
 }
 
+static void get_sregs_base(struct kvm_vcpu *vcpu,
+                           struct kvm_sregs *sregs)
+{
+       u64 tb = get_tb();
+
+       sregs->u.e.features |= KVM_SREGS_E_BASE;
+
+       sregs->u.e.csrr0 = vcpu->arch.csrr0;
+       sregs->u.e.csrr1 = vcpu->arch.csrr1;
+       sregs->u.e.mcsr = vcpu->arch.mcsr;
+       sregs->u.e.esr = vcpu->arch.esr;
+       sregs->u.e.dear = vcpu->arch.shared->dar;
+       sregs->u.e.tsr = vcpu->arch.tsr;
+       sregs->u.e.tcr = vcpu->arch.tcr;
+       sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
+       sregs->u.e.tb = tb;
+       sregs->u.e.vrsave = vcpu->arch.vrsave;
+}
+
+static int set_sregs_base(struct kvm_vcpu *vcpu,
+                          struct kvm_sregs *sregs)
+{
+       if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
+               return 0;
+
+       vcpu->arch.csrr0 = sregs->u.e.csrr0;
+       vcpu->arch.csrr1 = sregs->u.e.csrr1;
+       vcpu->arch.mcsr = sregs->u.e.mcsr;
+       vcpu->arch.esr = sregs->u.e.esr;
+       vcpu->arch.shared->dar = sregs->u.e.dear;
+       vcpu->arch.vrsave = sregs->u.e.vrsave;
+       vcpu->arch.tcr = sregs->u.e.tcr;
+
+       if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC)
+               vcpu->arch.dec = sregs->u.e.dec;
+
+       kvmppc_emulate_dec(vcpu);
+
+       if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) {
+               /*
+                * FIXME: existing KVM timer handling is incomplete.
+                * TSR cannot be read by the guest, and its value in
+                * vcpu->arch is always zero.  For now, just handle
+                * the case where the caller is trying to inject a
+                * decrementer interrupt.
+                */
+
+               if ((sregs->u.e.tsr & TSR_DIS) &&
+                   (vcpu->arch.tcr & TCR_DIE))
+                       kvmppc_core_queue_dec(vcpu);
+       }
+
+       return 0;
+}
+
+static void get_sregs_arch206(struct kvm_vcpu *vcpu,
+                              struct kvm_sregs *sregs)
+{
+       sregs->u.e.features |= KVM_SREGS_E_ARCH206;
+
+       sregs->u.e.pir = 0;
+       sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
+       sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
+       sregs->u.e.decar = vcpu->arch.decar;
+       sregs->u.e.ivpr = vcpu->arch.ivpr;
+}
+
+static int set_sregs_arch206(struct kvm_vcpu *vcpu,
+                             struct kvm_sregs *sregs)
+{
+       if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
+               return 0;
+
+       if (sregs->u.e.pir != 0)
+               return -EINVAL;
+
+       vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
+       vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
+       vcpu->arch.decar = sregs->u.e.decar;
+       vcpu->arch.ivpr = sregs->u.e.ivpr;
+
+       return 0;
+}
+
+void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
+{
+       sregs->u.e.features |= KVM_SREGS_E_IVOR;
+
+       sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
+       sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
+       sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
+       sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
+       sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
+       sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
+       sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
+       sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
+       sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
+       sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
+       sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
+       sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
+       sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
+       sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
+       sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
+       sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
+}
+
+int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
+{
+       if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
+               return 0;
+
+       vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
+       vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
+       vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
+       vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
+       vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
+       vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
+       vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
+       vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
+       vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
+       vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
+       vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
+       vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
+       vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
+       vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
+       vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
+       vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
+
+       return 0;
+}
+
 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
                                   struct kvm_sregs *sregs)
 {
-       return -ENOTSUPP;
+       sregs->pvr = vcpu->arch.pvr;
+
+       get_sregs_base(vcpu, sregs);
+       get_sregs_arch206(vcpu, sregs);
+       kvmppc_core_get_sregs(vcpu, sregs);
+       return 0;
 }
 
 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
                                   struct kvm_sregs *sregs)
 {
-       return -ENOTSUPP;
+       int ret;
+
+       if (vcpu->arch.pvr != sregs->pvr)
+               return -EINVAL;
+
+       ret = set_sregs_base(vcpu, sregs);
+       if (ret < 0)
+               return ret;
+
+       ret = set_sregs_arch206(vcpu, sregs);
+       if (ret < 0)
+               return ret;
+
+       return kvmppc_core_set_sregs(vcpu, sregs);
 }
 
 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
index 0c1af1267843c9953ffdf4b052bb60610c446561..318dbc61ba447e7352107de95daa59053e191d16 100644 (file)
@@ -97,6 +97,81 @@ int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,
        return 0;
 }
 
+void kvmppc_core_get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
+{
+       struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+
+       sregs->u.e.features |= KVM_SREGS_E_ARCH206_MMU | KVM_SREGS_E_SPE |
+                              KVM_SREGS_E_PM;
+       sregs->u.e.impl_id = KVM_SREGS_E_IMPL_FSL;
+
+       sregs->u.e.impl.fsl.features = 0;
+       sregs->u.e.impl.fsl.svr = vcpu_e500->svr;
+       sregs->u.e.impl.fsl.hid0 = vcpu_e500->hid0;
+       sregs->u.e.impl.fsl.mcar = vcpu_e500->mcar;
+
+       sregs->u.e.mas0 = vcpu_e500->mas0;
+       sregs->u.e.mas1 = vcpu_e500->mas1;
+       sregs->u.e.mas2 = vcpu_e500->mas2;
+       sregs->u.e.mas7_3 = ((u64)vcpu_e500->mas7 << 32) | vcpu_e500->mas3;
+       sregs->u.e.mas4 = vcpu_e500->mas4;
+       sregs->u.e.mas6 = vcpu_e500->mas6;
+
+       sregs->u.e.mmucfg = mfspr(SPRN_MMUCFG);
+       sregs->u.e.tlbcfg[0] = vcpu_e500->tlb0cfg;
+       sregs->u.e.tlbcfg[1] = vcpu_e500->tlb1cfg;
+       sregs->u.e.tlbcfg[2] = 0;
+       sregs->u.e.tlbcfg[3] = 0;
+
+       sregs->u.e.ivor_high[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL];
+       sregs->u.e.ivor_high[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA];
+       sregs->u.e.ivor_high[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND];
+       sregs->u.e.ivor_high[3] =
+               vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];
+
+       kvmppc_get_sregs_ivor(vcpu, sregs);
+}
+
+int kvmppc_core_set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
+{
+       struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+
+       if (sregs->u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {
+               vcpu_e500->svr = sregs->u.e.impl.fsl.svr;
+               vcpu_e500->hid0 = sregs->u.e.impl.fsl.hid0;
+               vcpu_e500->mcar = sregs->u.e.impl.fsl.mcar;
+       }
+
+       if (sregs->u.e.features & KVM_SREGS_E_ARCH206_MMU) {
+               vcpu_e500->mas0 = sregs->u.e.mas0;
+               vcpu_e500->mas1 = sregs->u.e.mas1;
+               vcpu_e500->mas2 = sregs->u.e.mas2;
+               vcpu_e500->mas7 = sregs->u.e.mas7_3 >> 32;
+               vcpu_e500->mas3 = (u32)sregs->u.e.mas7_3;
+               vcpu_e500->mas4 = sregs->u.e.mas4;
+               vcpu_e500->mas6 = sregs->u.e.mas6;
+       }
+
+       if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
+               return 0;
+
+       if (sregs->u.e.features & KVM_SREGS_E_SPE) {
+               vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] =
+                       sregs->u.e.ivor_high[0];
+               vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] =
+                       sregs->u.e.ivor_high[1];
+               vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] =
+                       sregs->u.e.ivor_high[2];
+       }
+
+       if (sregs->u.e.features & KVM_SREGS_E_PM) {
+               vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] =
+                       sregs->u.e.ivor_high[3];
+       }
+
+       return kvmppc_set_sregs_ivor(vcpu, sregs);
+}
+
 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
 {
        struct kvmppc_vcpu_e500 *vcpu_e500;
index e2fb47f035a52146dc3cc006827bfd15c7752e06..69cd665a0cafa3474b0be3de549d3c9d748306d3 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
  *
  * Author: Yu Liu, <yu.liu@freescale.com>
  *
@@ -78,8 +78,7 @@ int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
 
        switch (sprn) {
        case SPRN_PID:
-               vcpu_e500->pid[0] = vcpu->arch.shadow_pid =
-                       vcpu->arch.pid = spr_val;
+               kvmppc_set_pid(vcpu, spr_val);
                break;
        case SPRN_PID1:
                vcpu_e500->pid[1] = spr_val; break;
index 56ac4523857d14f7903df33830bedf0ababe0988..b18fe353397da59ee736bb9b3e4a51e89315b9e2 100644 (file)
@@ -675,6 +675,14 @@ int kvmppc_e500_tlb_search(struct kvm_vcpu *vcpu,
        return -1;
 }
 
+void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid)
+{
+       struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+
+       vcpu_e500->pid[0] = vcpu->arch.shadow_pid =
+               vcpu->arch.pid = pid;
+}
+
 void kvmppc_e500_tlb_setup(struct kvmppc_vcpu_e500 *vcpu_e500)
 {
        struct tlbe *tlbe;
index 8f7a3aa03c262b705fd0ccfab9d94bb811d5233c..141dce3c6810839b65f519767c070d28c3c11fa0 100644 (file)
@@ -114,6 +114,12 @@ void kvmppc_emulate_dec(struct kvm_vcpu *vcpu)
        }
 }
 
+u32 kvmppc_get_dec(struct kvm_vcpu *vcpu, u64 tb)
+{
+       u64 jd = tb - vcpu->arch.dec_jiffies;
+       return vcpu->arch.dec - jd;
+}
+
 /* XXX to do:
  * lhax
  * lhaux
@@ -279,11 +285,8 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
 
                        case SPRN_DEC:
                        {
-                               u64 jd = get_tb() - vcpu->arch.dec_jiffies;
-                               kvmppc_set_gpr(vcpu, rt, vcpu->arch.dec - jd);
-                               pr_debug("mfDEC: %x - %llx = %lx\n",
-                                        vcpu->arch.dec, jd,
-                                        kvmppc_get_gpr(vcpu, rt));
+                               kvmppc_set_gpr(vcpu, rt,
+                                              kvmppc_get_dec(vcpu, get_tb()));
                                break;
                        }
                        default:
index 9e6aa8bfd160438099daa44d80ff8a49a11d062e..616dd516ca1f7fc364de51957d17e5911cbe6135 100644 (file)
@@ -175,7 +175,11 @@ int kvm_dev_ioctl_check_extension(long ext)
        int r;
 
        switch (ext) {
+#ifdef CONFIG_BOOKE
+       case KVM_CAP_PPC_BOOKE_SREGS:
+#else
        case KVM_CAP_PPC_SEGSTATE:
+#endif
        case KVM_CAP_PPC_PAIRED_SINGLES:
        case KVM_CAP_PPC_UNSET_IRQ:
        case KVM_CAP_PPC_IRQ_LEVEL:
index 2f63ebeac639b054f23b43d0ee8ab66cc758b65b..55ef181521ff803231f7f1989f5ec5b5374b606b 100644 (file)
@@ -543,6 +543,7 @@ struct kvm_ppc_pvinfo {
 #define KVM_CAP_ASYNC_PF 59
 #define KVM_CAP_TSC_CONTROL 60
 #define KVM_CAP_GET_TSC_KHZ 61
+#define KVM_CAP_PPC_BOOKE_SREGS 62
 
 #ifdef KVM_CAP_IRQ_ROUTING