}
*nanosec = div1 * div2 * i8253_osc_base;
- /* masking is done since counter maps zero to 0x10000 */
+ /* masking is done since counter maps zero to 0x10000 */
*d1 = div1 & 0xffff;
*d2 = div2 & 0xffff;
}
return -1;
byte = counter_number << 6;
- byte |= 0x30; /* load low then high byte */
- byte |= (mode << 1); /* set counter mode */
+ byte |= 0x30; /* load low then high byte */
+ byte |= (mode << 1); /* set counter mode */
outb(byte, base_address + (i8254_control_reg << regshift));
- byte = count & 0xff; /* lsb of counter value */
+ byte = count & 0xff; /* lsb of counter value */
outb(byte, base_address + (counter_number << regshift));
- byte = (count >> 8) & 0xff; /* msb of counter value */
+ byte = (count >> 8) & 0xff; /* msb of counter value */
outb(byte, base_address + (counter_number << regshift));
return 0;
return -1;
byte = counter_number << 6;
- byte |= 0x30; /* load low then high byte */
- byte |= (mode << 1); /* set counter mode */
+ byte |= 0x30; /* load low then high byte */
+ byte |= (mode << 1); /* set counter mode */
writeb(byte, base_address + (i8254_control_reg << regshift));
- byte = count & 0xff; /* lsb of counter value */
+ byte = count & 0xff; /* lsb of counter value */
writeb(byte, base_address + (counter_number << regshift));
- byte = (count >> 8) & 0xff; /* msb of counter value */
+ byte = (count >> 8) & 0xff; /* msb of counter value */
writeb(byte, base_address + (counter_number << regshift));
return 0;
}
-/* Returns 16 bit counter value, should work for 8253 also.*/
+/* Returns 16 bit counter value, should work for 8253 also. */
static inline int i8254_read(unsigned long base_address, unsigned int regshift,
unsigned int counter_number)
{
if (counter_number > 2)
return -1;
- /* latch counter */
+ /* latch counter */
byte = counter_number << 6;
outb(byte, base_address + (i8254_control_reg << regshift));
- /* read lsb */
+ /* read lsb */
ret = inb(base_address + (counter_number << regshift));
- /* read msb */
+ /* read msb */
ret += inb(base_address + (counter_number << regshift)) << 8;
return ret;
if (counter_number > 2)
return -1;
- /* latch counter */
+ /* latch counter */
byte = counter_number << 6;
writeb(byte, base_address + (i8254_control_reg << regshift));
- /* read lsb */
+ /* read lsb */
ret = readb(base_address + (counter_number << regshift));
- /* read msb */
+ /* read msb */
ret += readb(base_address + (counter_number << regshift)) << 8;
return ret;
if (counter_number > 2)
return;
- byte = count & 0xff; /* lsb of counter value */
+ byte = count & 0xff; /* lsb of counter value */
outb(byte, base_address + (counter_number << regshift));
- byte = (count >> 8) & 0xff; /* msb of counter value */
+ byte = (count >> 8) & 0xff; /* msb of counter value */
outb(byte, base_address + (counter_number << regshift));
}
if (counter_number > 2)
return;
- byte = count & 0xff; /* lsb of counter value */
+ byte = count & 0xff; /* lsb of counter value */
writeb(byte, base_address + (counter_number << regshift));
- byte = (count >> 8) & 0xff; /* msb of counter value */
+ byte = (count >> 8) & 0xff; /* msb of counter value */
writeb(byte, base_address + (counter_number << regshift));
}
return -1;
byte = counter_number << 6;
- byte |= 0x30; /* load low then high byte */
- byte |= mode; /* set counter mode and BCD|binary */
+ byte |= 0x30; /* load low then high byte */
+ byte |= mode; /* set counter mode and BCD|binary */
outb(byte, base_address + (i8254_control_reg << regshift));
return 0;
return -1;
byte = counter_number << 6;
- byte |= 0x30; /* load low then high byte */
- byte |= mode; /* set counter mode and BCD|binary */
+ byte |= 0x30; /* load low then high byte */
+ byte |= mode; /* set counter mode and BCD|binary */
writeb(byte, base_address + (i8254_control_reg << regshift));
return 0;