ARM: realview: add flash devices to the PB1176 DTS
authorLinus Walleij <linus.walleij@linaro.org>
Tue, 14 Oct 2014 13:05:57 +0000 (15:05 +0200)
committerLinus Walleij <linus.walleij@linaro.org>
Thu, 11 Feb 2016 14:52:44 +0000 (15:52 +0100)
This adds the flash memories and ROM to the PB1175 DTS file.
The secure flash is marked as "disabled" by default so as to
protect the user from overwriting the boot monitor.

Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
arch/arm/boot/dts/arm-realview-pb1176.dts

index 1bc64cda819e0b70530575ed1ec6d5c57e19b075..b7d727ef1868db5c921fe3b9e74ad0b819d9c873 100644 (file)
                clock-frequency = <0>;
        };
 
+       flash@30000000 {
+               compatible = "arm,versatile-flash", "cfi-flash";
+               reg = <0x30000000 0x4000000>;
+               bank-width = <4>;
+       };
+
+       fpga_flash@38000000 {
+               compatible = "arm,versatile-flash", "cfi-flash";
+               reg = <0x38000000 0x800000>;
+               bank-width = <4>;
+       };
+
+       /*
+        * The "secure flash" contains things like the boot
+        * monitor so we don't want people to accidentally
+        * screw this up. Mark the device tree node disabled
+        * by default.
+        */
+       secflash@3c000000 {
+               compatible = "arm,versatile-flash", "cfi-flash";
+               reg = <0x3c000000 0x4000000>;
+               bank-width = <4>;
+               status = "disabled";
+       };
+
        soc {
                #address-cells = <1>;
                #size-cells = <1>;
                        clocks = <&uartclk>, <&pclk>;
                        clock-names = "uartclk", "apb_pclk";
                };
+
+               /* Direct-mapped development chip ROM */
+               pb1176_rom@10200000 {
+                       compatible = "direct-mapped";
+                       reg = <0x10200000 0x4000>;
+                       bank-width = <1>;
+               };
        };
 
        /* These peripherals are inside the FPGA rather than the DevChip */