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mtd: nand_ids: improve LEGACY_ID_NAND macro a bit
authorArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
Tue, 19 Mar 2013 08:29:26 +0000 (10:29 +0200)
committerDavid Woodhouse <David.Woodhouse@intel.com>
Fri, 5 Apr 2013 12:21:41 +0000 (13:21 +0100)
Notice that all the flashes belonging to the "legacy ID" class have 512 bytes
NAND page. This means we may simplify the 'LEGACY_ID_NAND()' macro as well as
the NAND ID table a little.

Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
drivers/mtd/nand/nand_ids.c patch | blob | blame | history
drivers/mtd/nand/sm_common.c patch | blob | blame | history
include/linux/mtd/nand.h patch | blob | blame | history

diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c
index d2c72368a7b5ca1f3859491f2c72de258b5c1644..80634b05a395ff32a0f1bdb371ee691156cbf6f8 100644 (file)
--- a/drivers/mtd/nand/nand_ids.c
+++ b/drivers/mtd/nand/nand_ids.c
@@ -44,36 +44,36 @@ struct nand_flash_dev nand_flash_ids[] = {
                { .id = {0x98, 0xde, 0x94, 0x82, 0x76, 0x56, 0x04, 0x20} },
                  SZ_8K, SZ_8K, SZ_2M, 0, 8, 640},
 
-       LEGACY_ID_NAND("NAND 4MiB 5V 8-bit",   0x6B, 512, 4, 0x2000, SP_OPTIONS),
-       LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE3, 512, 4, 0x2000, SP_OPTIONS),
-       LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE5, 512, 4, 0x2000, SP_OPTIONS),
-       LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xD6, 512, 8, 0x2000, SP_OPTIONS),
-       LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xE6, 512, 8, 0x2000, SP_OPTIONS),
-
-       LEGACY_ID_NAND("NAND 16MiB 1,8V 8-bit",  0x33, 512, 16, 0x4000, SP_OPTIONS),
-       LEGACY_ID_NAND("NAND 16MiB 3,3V 8-bit",  0x73, 512, 16, 0x4000, SP_OPTIONS),
-       LEGACY_ID_NAND("NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, SP_OPTIONS16),
-       LEGACY_ID_NAND("NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, SP_OPTIONS16),
-
-       LEGACY_ID_NAND("NAND 32MiB 1,8V 8-bit",  0x35, 512, 32, 0x4000, SP_OPTIONS),
-       LEGACY_ID_NAND("NAND 32MiB 3,3V 8-bit",  0x75, 512, 32, 0x4000, SP_OPTIONS),
-       LEGACY_ID_NAND("NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, SP_OPTIONS16),
-       LEGACY_ID_NAND("NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, SP_OPTIONS16),
-
-       LEGACY_ID_NAND("NAND 64MiB 1,8V 8-bit",  0x36, 512, 64, 0x4000, SP_OPTIONS),
-       LEGACY_ID_NAND("NAND 64MiB 3,3V 8-bit",  0x76, 512, 64, 0x4000, SP_OPTIONS),
-       LEGACY_ID_NAND("NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, SP_OPTIONS16),
-       LEGACY_ID_NAND("NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, SP_OPTIONS16),
-
-       LEGACY_ID_NAND("NAND 128MiB 1,8V 8-bit",  0x78, 512, 128, 0x4000, SP_OPTIONS),
-       LEGACY_ID_NAND("NAND 128MiB 1,8V 8-bit",  0x39, 512, 128, 0x4000, SP_OPTIONS),
-       LEGACY_ID_NAND("NAND 128MiB 3,3V 8-bit",  0x79, 512, 128, 0x4000, SP_OPTIONS),
-       LEGACY_ID_NAND("NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, SP_OPTIONS16),
-       LEGACY_ID_NAND("NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, SP_OPTIONS16),
-       LEGACY_ID_NAND("NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, SP_OPTIONS16),
-       LEGACY_ID_NAND("NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, SP_OPTIONS16),
-
-       LEGACY_ID_NAND("NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, SP_OPTIONS),
+       LEGACY_ID_NAND("NAND 4MiB 5V 8-bit",   0x6B, 4, 0x2000, SP_OPTIONS),
+       LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE3, 4, 0x2000, SP_OPTIONS),
+       LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE5, 4, 0x2000, SP_OPTIONS),
+       LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xD6, 8, 0x2000, SP_OPTIONS),
+       LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xE6, 8, 0x2000, SP_OPTIONS),
+
+       LEGACY_ID_NAND("NAND 16MiB 1,8V 8-bit",  0x33, 16, 0x4000, SP_OPTIONS),
+       LEGACY_ID_NAND("NAND 16MiB 3,3V 8-bit",  0x73, 16, 0x4000, SP_OPTIONS),
+       LEGACY_ID_NAND("NAND 16MiB 1,8V 16-bit", 0x43, 16, 0x4000, SP_OPTIONS16),
+       LEGACY_ID_NAND("NAND 16MiB 3,3V 16-bit", 0x53, 16, 0x4000, SP_OPTIONS16),
+
+       LEGACY_ID_NAND("NAND 32MiB 1,8V 8-bit",  0x35, 32, 0x4000, SP_OPTIONS),
+       LEGACY_ID_NAND("NAND 32MiB 3,3V 8-bit",  0x75, 32, 0x4000, SP_OPTIONS),
+       LEGACY_ID_NAND("NAND 32MiB 1,8V 16-bit", 0x45, 32, 0x4000, SP_OPTIONS16),
+       LEGACY_ID_NAND("NAND 32MiB 3,3V 16-bit", 0x55, 32, 0x4000, SP_OPTIONS16),
+
+       LEGACY_ID_NAND("NAND 64MiB 1,8V 8-bit",  0x36, 64, 0x4000, SP_OPTIONS),
+       LEGACY_ID_NAND("NAND 64MiB 3,3V 8-bit",  0x76, 64, 0x4000, SP_OPTIONS),
+       LEGACY_ID_NAND("NAND 64MiB 1,8V 16-bit", 0x46, 64, 0x4000, SP_OPTIONS16),
+       LEGACY_ID_NAND("NAND 64MiB 3,3V 16-bit", 0x56, 64, 0x4000, SP_OPTIONS16),
+
+       LEGACY_ID_NAND("NAND 128MiB 1,8V 8-bit",  0x78, 128, 0x4000, SP_OPTIONS),
+       LEGACY_ID_NAND("NAND 128MiB 1,8V 8-bit",  0x39, 128, 0x4000, SP_OPTIONS),
+       LEGACY_ID_NAND("NAND 128MiB 3,3V 8-bit",  0x79, 128, 0x4000, SP_OPTIONS),
+       LEGACY_ID_NAND("NAND 128MiB 1,8V 16-bit", 0x72, 128, 0x4000, SP_OPTIONS16),
+       LEGACY_ID_NAND("NAND 128MiB 1,8V 16-bit", 0x49, 128, 0x4000, SP_OPTIONS16),
+       LEGACY_ID_NAND("NAND 128MiB 3,3V 16-bit", 0x74, 128, 0x4000, SP_OPTIONS16),
+       LEGACY_ID_NAND("NAND 128MiB 3,3V 16-bit", 0x59, 128, 0x4000, SP_OPTIONS16),
+
+       LEGACY_ID_NAND("NAND 256MiB 3,3V 8-bit", 0x71, 256, 0x4000, SP_OPTIONS),
 
        /*
         * These are the new chips with large page size. Their page size and
diff --git a/drivers/mtd/nand/sm_common.c b/drivers/mtd/nand/sm_common.c
index 6cdf1e88ff309c0a1419d5daa8b51c386093c032..7bcab623acc3b3b40b5c5cedd59bc16c97ac80e6 100644 (file)
--- a/drivers/mtd/nand/sm_common.c
+++ b/drivers/mtd/nand/sm_common.c
@@ -68,35 +68,35 @@ static int sm_block_markbad(struct mtd_info *mtd, loff_t ofs)
 }
 
 static struct nand_flash_dev nand_smartmedia_flash_ids[] = {
-       LEGACY_ID_NAND("SmartMedia 2MiB 3,3V ROM",   0x5d, 512, 2,   0x2000, NAND_ROM),
-       LEGACY_ID_NAND("SmartMedia 4MiB 3,3V",       0xe3, 512, 4,   0x2000, 0),
-       LEGACY_ID_NAND("SmartMedia 4MiB 3,3/5V",     0xe5, 512, 4,   0x2000, 0),
-       LEGACY_ID_NAND("SmartMedia 4MiB 5V",         0x6b, 512, 4,   0x2000, 0),
-       LEGACY_ID_NAND("SmartMedia 4MiB 3,3V ROM",   0xd5, 512, 4,   0x2000, NAND_ROM),
-       LEGACY_ID_NAND("SmartMedia 8MiB 3,3V",       0xe6, 512, 8,   0x2000, 0),
-       LEGACY_ID_NAND("SmartMedia 8MiB 3,3V ROM",   0xd6, 512, 8,   0x2000, NAND_ROM),
-       LEGACY_ID_NAND("SmartMedia 16MiB 3,3V",      0x73, 512, 16,  0x4000, 0),
-       LEGACY_ID_NAND("SmartMedia 16MiB 3,3V ROM",  0x57, 512, 16,  0x4000, NAND_ROM),
-       LEGACY_ID_NAND("SmartMedia 32MiB 3,3V",      0x75, 512, 32,  0x4000, 0),
-       LEGACY_ID_NAND("SmartMedia 32MiB 3,3V ROM",  0x58, 512, 32,  0x4000, NAND_ROM),
-       LEGACY_ID_NAND("SmartMedia 64MiB 3,3V",      0x76, 512, 64,  0x4000, 0),
-       LEGACY_ID_NAND("SmartMedia 64MiB 3,3V ROM",  0xd9, 512, 64,  0x4000, NAND_ROM),
-       LEGACY_ID_NAND("SmartMedia 128MiB 3,3V",     0x79, 512, 128, 0x4000, 0),
-       LEGACY_ID_NAND("SmartMedia 128MiB 3,3V ROM", 0xda, 512, 128, 0x4000, NAND_ROM),
-       LEGACY_ID_NAND("SmartMedia 256MiB 3, 3V",    0x71, 512, 256, 0x4000, 0),
-       LEGACY_ID_NAND("SmartMedia 256MiB 3,3V ROM", 0x5b, 512, 256, 0x4000, NAND_ROM),
+       LEGACY_ID_NAND("SmartMedia 2MiB 3,3V ROM",   0x5d, 2,   0x2000, NAND_ROM),
+       LEGACY_ID_NAND("SmartMedia 4MiB 3,3V",       0xe3, 4,   0x2000, 0),
+       LEGACY_ID_NAND("SmartMedia 4MiB 3,3/5V",     0xe5, 4,   0x2000, 0),
+       LEGACY_ID_NAND("SmartMedia 4MiB 5V",         0x6b, 4,   0x2000, 0),
+       LEGACY_ID_NAND("SmartMedia 4MiB 3,3V ROM",   0xd5, 4,   0x2000, NAND_ROM),
+       LEGACY_ID_NAND("SmartMedia 8MiB 3,3V",       0xe6, 8,   0x2000, 0),
+       LEGACY_ID_NAND("SmartMedia 8MiB 3,3V ROM",   0xd6, 8,   0x2000, NAND_ROM),
+       LEGACY_ID_NAND("SmartMedia 16MiB 3,3V",      0x73, 16,  0x4000, 0),
+       LEGACY_ID_NAND("SmartMedia 16MiB 3,3V ROM",  0x57, 16,  0x4000, NAND_ROM),
+       LEGACY_ID_NAND("SmartMedia 32MiB 3,3V",      0x75, 32,  0x4000, 0),
+       LEGACY_ID_NAND("SmartMedia 32MiB 3,3V ROM",  0x58, 32,  0x4000, NAND_ROM),
+       LEGACY_ID_NAND("SmartMedia 64MiB 3,3V",      0x76, 64,  0x4000, 0),
+       LEGACY_ID_NAND("SmartMedia 64MiB 3,3V ROM",  0xd9, 64,  0x4000, NAND_ROM),
+       LEGACY_ID_NAND("SmartMedia 128MiB 3,3V",     0x79, 128, 0x4000, 0),
+       LEGACY_ID_NAND("SmartMedia 128MiB 3,3V ROM", 0xda, 128, 0x4000, NAND_ROM),
+       LEGACY_ID_NAND("SmartMedia 256MiB 3, 3V",    0x71, 256, 0x4000, 0),
+       LEGACY_ID_NAND("SmartMedia 256MiB 3,3V ROM", 0x5b, 256, 0x4000, NAND_ROM),
        {NULL}
 };
 
 static struct nand_flash_dev nand_xd_flash_ids[] = {
-       LEGACY_ID_NAND("xD 16MiB 3,3V",  0x73, 512, 16,   0x4000, 0),
-       LEGACY_ID_NAND("xD 32MiB 3,3V",  0x75, 512, 32,   0x4000, 0),
-       LEGACY_ID_NAND("xD 64MiB 3,3V",  0x76, 512, 64,   0x4000, 0),
-       LEGACY_ID_NAND("xD 128MiB 3,3V", 0x79, 512, 128,  0x4000, 0),
-       LEGACY_ID_NAND("xD 256MiB 3,3V", 0x71, 512, 256,  0x4000, NAND_BROKEN_XD),
-       LEGACY_ID_NAND("xD 512MiB 3,3V", 0xdc, 512, 512,  0x4000, NAND_BROKEN_XD),
-       LEGACY_ID_NAND("xD 1GiB 3,3V",   0xd3, 512, 1024, 0x4000, NAND_BROKEN_XD),
-       LEGACY_ID_NAND("xD 2GiB 3,3V",   0xd5, 512, 2048, 0x4000, NAND_BROKEN_XD),
+       LEGACY_ID_NAND("xD 16MiB 3,3V",  0x73, 16,   0x4000, 0),
+       LEGACY_ID_NAND("xD 32MiB 3,3V",  0x75, 32,   0x4000, 0),
+       LEGACY_ID_NAND("xD 64MiB 3,3V",  0x76, 64,   0x4000, 0),
+       LEGACY_ID_NAND("xD 128MiB 3,3V", 0x79, 128,  0x4000, 0),
+       LEGACY_ID_NAND("xD 256MiB 3,3V", 0x71, 256,  0x4000, NAND_BROKEN_XD),
+       LEGACY_ID_NAND("xD 512MiB 3,3V", 0xdc, 512,  0x4000, NAND_BROKEN_XD),
+       LEGACY_ID_NAND("xD 1GiB 3,3V",   0xd3, 1024, 0x4000, NAND_BROKEN_XD),
+       LEGACY_ID_NAND("xD 2GiB 3,3V",   0xd5, 2048, 0x4000, NAND_BROKEN_XD),
        {NULL}
 };
 
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 13786f0ae12a5b34846bf60dd6514d33cd6fa7b4..ebf970e114281dd4731187b18aa1a45eae425fba 100644 (file)
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -552,12 +552,11 @@ struct nand_chip {
 /*
  * A helper for defining older NAND chips where the second ID byte fully
  * defined the chip, including the geometry (chip size, eraseblock size, page
- * size).
+ * size). All these chips have 512 bytes NAND page size.
  */
-#define LEGACY_ID_NAND(nm, devid, pagesz, chipsz, erasesz, opts)       \
-       { .name = (nm), {{ .dev_id = (devid) }}, .pagesize = (pagesz), \
-         .chipsize = (chipsz), .erasesize = (erasesz),                \
-         .options = (opts) }
+#define LEGACY_ID_NAND(nm, devid, chipsz, erasesz, opts)          \
+       { .name = (nm), {{ .dev_id = (devid) }}, .pagesize = 512, \
+         .chipsize = (chipsz), .erasesize = (erasesz), .options = (opts) }
 
 /*
  * A helper for defining newer chips which report their page size and