net/mlx5e: Add support for reading connector type from PTYS
authorEran Ben Elisha <eranbe@mellanox.com>
Mon, 13 Feb 2017 12:00:59 +0000 (14:00 +0200)
committerSaeed Mahameed <saeedm@mellanox.com>
Thu, 8 Jun 2017 11:12:00 +0000 (14:12 +0300)
Read port connector type from the firmware instead of caching it in the
driver metadata.

Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
include/linux/mlx5/mlx5_ifc.h
include/linux/mlx5/port.h

index e9e33fd682796e48322b74280c86690ecd5d6ba3..f03c2d088d0cee51b233d69fe37503ffd6a05bc5 100644 (file)
@@ -809,8 +809,23 @@ static void get_advertising(u32 eth_proto_cap, u8 tx_pause,
                ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Asym_Pause);
 }
 
-static u8 get_connector_port(u32 eth_proto)
+static int ptys2connector_type[MLX5E_CONNECTOR_TYPE_NUMBER] = {
+               [MLX5E_PORT_UNKNOWN]            = PORT_OTHER,
+               [MLX5E_PORT_NONE]               = PORT_NONE,
+               [MLX5E_PORT_TP]                 = PORT_TP,
+               [MLX5E_PORT_AUI]                = PORT_AUI,
+               [MLX5E_PORT_BNC]                = PORT_BNC,
+               [MLX5E_PORT_MII]                = PORT_MII,
+               [MLX5E_PORT_FIBRE]              = PORT_FIBRE,
+               [MLX5E_PORT_DA]                 = PORT_DA,
+               [MLX5E_PORT_OTHER]              = PORT_OTHER,
+       };
+
+static u8 get_connector_port(u32 eth_proto, u8 connector_type)
 {
+       if (connector_type && connector_type < MLX5E_CONNECTOR_TYPE_NUMBER)
+               return ptys2connector_type[connector_type];
+
        if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
                         | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
                         | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
@@ -856,6 +871,7 @@ static int mlx5e_get_link_ksettings(struct net_device *netdev,
        u32 eth_proto_oper;
        u8 an_disable_admin;
        u8 an_status;
+       u8 connector_type;
        int err;
 
        err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
@@ -871,6 +887,7 @@ static int mlx5e_get_link_ksettings(struct net_device *netdev,
        eth_proto_lp     = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
        an_disable_admin = MLX5_GET(ptys_reg, out, an_disable_admin);
        an_status        = MLX5_GET(ptys_reg, out, an_status);
+       connector_type   = MLX5_GET(ptys_reg, out, connector_type);
 
        mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
 
@@ -883,7 +900,8 @@ static int mlx5e_get_link_ksettings(struct net_device *netdev,
 
        eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
 
-       link_ksettings->base.port = get_connector_port(eth_proto_oper);
+       link_ksettings->base.port = get_connector_port(eth_proto_oper,
+                                                      connector_type);
        get_lp_advertising(eth_proto_lp, link_ksettings);
 
        if (an_status == MLX5_AN_COMPLETE)
index ec308657af3bf45b98f26a67ef47a67a453832e7..32b044e953d22ae5ddbc2ffaa1f73ca4273db83d 100644 (file)
@@ -7295,7 +7295,8 @@ struct mlx5_ifc_ptys_reg_bits {
        u8         ib_link_width_oper[0x10];
        u8         ib_proto_oper[0x10];
 
-       u8         reserved_at_160[0x20];
+       u8         reserved_at_160[0x1c];
+       u8         connector_type[0x4];
 
        u8         eth_proto_lp_advertise[0x20];
 
@@ -7698,8 +7699,10 @@ struct mlx5_ifc_peir_reg_bits {
 };
 
 struct mlx5_ifc_pcam_enhanced_features_bits {
-       u8         reserved_at_0[0x7e];
+       u8         reserved_at_0[0x7c];
 
+       u8         ptys_connector_type[0x1];
+       u8         reserved_at_7d[0x1];
        u8         ppcnt_discard_group[0x1];
        u8         ppcnt_statistical_group[0x1];
 };
index e527732fb31bcc16791a93f1d45f5de2dd5d7649..c57d4b7de3a80203719f36319d17fb4794dd40b7 100644 (file)
@@ -92,6 +92,19 @@ enum mlx5e_link_mode {
        MLX5E_LINK_MODES_NUMBER,
 };
 
+enum mlx5e_connector_type {
+       MLX5E_PORT_UNKNOWN      = 0,
+       MLX5E_PORT_NONE                 = 1,
+       MLX5E_PORT_TP                   = 2,
+       MLX5E_PORT_AUI                  = 3,
+       MLX5E_PORT_BNC                  = 4,
+       MLX5E_PORT_MII                  = 5,
+       MLX5E_PORT_FIBRE                = 6,
+       MLX5E_PORT_DA                   = 7,
+       MLX5E_PORT_OTHER                = 8,
+       MLX5E_CONNECTOR_TYPE_NUMBER,
+};
+
 #define MLX5E_PROT_MASK(link_mode) (1 << link_mode)
 
 #define PORT_MODULE_EVENT_MODULE_STATUS_MASK 0xF