drm/i915/gvt: Fix alignment for GTT allocation
authorZhenyu Wang <zhenyuw@linux.intel.com>
Mon, 13 Feb 2017 06:31:13 +0000 (14:31 +0800)
committerZhenyu Wang <zhenyuw@linux.intel.com>
Tue, 14 Feb 2017 09:03:30 +0000 (17:03 +0800)
We need to properly setup alignment for GTT start/end/size
as required. Fixed warning from i915 gem.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
drivers/gpu/drm/i915/gvt/aperture_gm.c

index 7311aeab16f7ae4b1256cdc60e1e5d4f95acc474..3b6caaca975135d6b8d595393ffc372bc14107bc 100644 (file)
@@ -49,20 +49,21 @@ static int alloc_gm(struct intel_vgpu *vgpu, bool high_gm)
        if (high_gm) {
                node = &vgpu->gm.high_gm_node;
                size = vgpu_hidden_sz(vgpu);
-               start = gvt_hidden_gmadr_base(gvt);
-               end = gvt_hidden_gmadr_end(gvt);
+               start = ALIGN(gvt_hidden_gmadr_base(gvt), I915_GTT_PAGE_SIZE);
+               end = ALIGN(gvt_hidden_gmadr_end(gvt), I915_GTT_PAGE_SIZE);
                flags = PIN_HIGH;
        } else {
                node = &vgpu->gm.low_gm_node;
                size = vgpu_aperture_sz(vgpu);
-               start = gvt_aperture_gmadr_base(gvt);
-               end = gvt_aperture_gmadr_end(gvt);
+               start = ALIGN(gvt_aperture_gmadr_base(gvt), I915_GTT_PAGE_SIZE);
+               end = ALIGN(gvt_aperture_gmadr_end(gvt), I915_GTT_PAGE_SIZE);
                flags = PIN_MAPPABLE;
        }
 
        mutex_lock(&dev_priv->drm.struct_mutex);
        ret = i915_gem_gtt_insert(&dev_priv->ggtt.base, node,
-                                 size, 4096, I915_COLOR_UNEVICTABLE,
+                                 size, I915_GTT_PAGE_SIZE,
+                                 I915_COLOR_UNEVICTABLE,
                                  start, end, flags);
        mutex_unlock(&dev_priv->drm.struct_mutex);
        if (ret)
@@ -254,7 +255,7 @@ static int alloc_resource(struct intel_vgpu *vgpu,
        if (request > avail)
                goto no_enough_resource;
 
-       vgpu_aperture_sz(vgpu) = request;
+       vgpu_aperture_sz(vgpu) = ALIGN(request, I915_GTT_PAGE_SIZE);
 
        item = "high GM space";
        max = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE;
@@ -265,7 +266,7 @@ static int alloc_resource(struct intel_vgpu *vgpu,
        if (request > avail)
                goto no_enough_resource;
 
-       vgpu_hidden_sz(vgpu) = request;
+       vgpu_hidden_sz(vgpu) = ALIGN(request, I915_GTT_PAGE_SIZE);
 
        item = "fence";
        max = gvt_fence_sz(gvt) - HOST_FENCE;