powerpc/perf: Add new BHRB related generic functions, data and flags
authorAnshuman Khandual <khandual@linux.vnet.ibm.com>
Mon, 22 Apr 2013 19:42:42 +0000 (19:42 +0000)
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>
Fri, 26 Apr 2013 06:11:12 +0000 (16:11 +1000)
This patch adds couple of generic functions to power_pmu structure
which would configure the BHRB and it's filters. It also adds
representation of the number of BHRB entries present on the PMU.
A new PMU flag PPMU_BHRB would indicate presence of BHRB feature.

Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
arch/powerpc/include/asm/perf_event_server.h

index 57b42da03b62683b333c999e0734416ad56ac781..3f0c15c6f0685b865875a52b34f867abc266b78d 100644 (file)
@@ -33,6 +33,8 @@ struct power_pmu {
                                unsigned long *valp);
        int             (*get_alternatives)(u64 event_id, unsigned int flags,
                                u64 alt[]);
+       u64             (*bhrb_filter_map)(u64 branch_sample_type);
+       void            (*config_bhrb)(u64 pmu_bhrb_filter);
        void            (*disable_pmc)(unsigned int pmc, unsigned long mmcr[]);
        int             (*limited_pmc_event)(u64 event_id);
        u32             flags;
@@ -42,6 +44,9 @@ struct power_pmu {
        int             (*cache_events)[PERF_COUNT_HW_CACHE_MAX]
                               [PERF_COUNT_HW_CACHE_OP_MAX]
                               [PERF_COUNT_HW_CACHE_RESULT_MAX];
+
+       /* BHRB entries in the PMU */
+       int             bhrb_nr;
 };
 
 /*
@@ -54,6 +59,7 @@ struct power_pmu {
 #define PPMU_SIAR_VALID                0x00000010 /* Processor has SIAR Valid bit */
 #define PPMU_HAS_SSLOT         0x00000020 /* Has sampled slot in MMCRA */
 #define PPMU_HAS_SIER          0x00000040 /* Has SIER */
+#define PPMU_BHRB              0x00000080 /* has BHRB feature enabled */
 
 /*
  * Values for flags to get_alternatives()