igb: Refactor of init_nvm_params
authorCarolyn Wyborny <carolyn.wyborny@intel.com>
Tue, 16 Jul 2013 19:17:32 +0000 (19:17 +0000)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Thu, 22 Aug 2013 09:25:57 +0000 (02:25 -0700)
This patch refactors the init_nvm_params functions for 82575 and adds a new
function for the i210/i211 devices in order to configure separately the NVM
functionality for the i210/i211 family.

Signed-off-by: Carolyn Wyborny <carolyn.wyborny@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/igb/e1000_82575.c
drivers/net/ethernet/intel/igb/e1000_defines.h
drivers/net/ethernet/intel/igb/e1000_hw.h
drivers/net/ethernet/intel/igb/e1000_i210.c
drivers/net/ethernet/intel/igb/e1000_i210.h

index 9057d10a698a60fed35d87e0b0f5b2e67a92462b..8d79face07173a9cee599335340d53de04ac7955 100644 (file)
@@ -238,6 +238,7 @@ static s32 igb_init_nvm_params_82575(struct e1000_hw *hw)
 
        size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
                     E1000_EECD_SIZE_EX_SHIFT);
+
        /* Added to a constant, "size" becomes the left-shift value
         * for setting word_size.
         */
@@ -250,86 +251,52 @@ static s32 igb_init_nvm_params_82575(struct e1000_hw *hw)
                size = 15;
 
        nvm->word_size = 1 << size;
-       if (hw->mac.type < e1000_i210) {
-               nvm->opcode_bits = 8;
-               nvm->delay_usec = 1;
-
-               switch (nvm->override) {
-               case e1000_nvm_override_spi_large:
-                       nvm->page_size = 32;
-                       nvm->address_bits = 16;
-                       break;
-               case e1000_nvm_override_spi_small:
-                       nvm->page_size = 8;
-                       nvm->address_bits = 8;
-                       break;
-               default:
-                       nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;
-                       nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ?
-                                           16 : 8;
-                       break;
-               }
-               if (nvm->word_size == (1 << 15))
-                       nvm->page_size = 128;
+       nvm->opcode_bits = 8;
+       nvm->delay_usec = 1;
 
-               nvm->type = e1000_nvm_eeprom_spi;
-       } else {
-               nvm->type = e1000_nvm_flash_hw;
+       switch (nvm->override) {
+       case e1000_nvm_override_spi_large:
+               nvm->page_size = 32;
+               nvm->address_bits = 16;
+               break;
+       case e1000_nvm_override_spi_small:
+               nvm->page_size = 8;
+               nvm->address_bits = 8;
+               break;
+       default:
+               nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;
+               nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ?
+                                   16 : 8;
+               break;
        }
+       if (nvm->word_size == (1 << 15))
+               nvm->page_size = 128;
+
+       nvm->type = e1000_nvm_eeprom_spi;
 
        /* NVM Function Pointers */
+       nvm->ops.acquire = igb_acquire_nvm_82575;
+       nvm->ops.release = igb_release_nvm_82575;
+       nvm->ops.write = igb_write_nvm_spi;
+       nvm->ops.validate = igb_validate_nvm_checksum;
+       nvm->ops.update = igb_update_nvm_checksum;
+       if (nvm->word_size < (1 << 15))
+               nvm->ops.read = igb_read_nvm_eerd;
+       else
+               nvm->ops.read = igb_read_nvm_spi;
+
+       /* override generic family function pointers for specific descendants */
        switch (hw->mac.type) {
        case e1000_82580:
                nvm->ops.validate = igb_validate_nvm_checksum_82580;
                nvm->ops.update = igb_update_nvm_checksum_82580;
-               nvm->ops.acquire = igb_acquire_nvm_82575;
-               nvm->ops.release = igb_release_nvm_82575;
-               if (nvm->word_size < (1 << 15))
-                       nvm->ops.read = igb_read_nvm_eerd;
-               else
-                       nvm->ops.read = igb_read_nvm_spi;
-               nvm->ops.write = igb_write_nvm_spi;
                break;
        case e1000_i354:
        case e1000_i350:
                nvm->ops.validate = igb_validate_nvm_checksum_i350;
                nvm->ops.update = igb_update_nvm_checksum_i350;
-               nvm->ops.acquire = igb_acquire_nvm_82575;
-               nvm->ops.release = igb_release_nvm_82575;
-               if (nvm->word_size < (1 << 15))
-                       nvm->ops.read = igb_read_nvm_eerd;
-               else
-                       nvm->ops.read = igb_read_nvm_spi;
-               nvm->ops.write = igb_write_nvm_spi;
-               break;
-       case e1000_i210:
-               nvm->ops.validate = igb_validate_nvm_checksum_i210;
-               nvm->ops.update   = igb_update_nvm_checksum_i210;
-               nvm->ops.acquire = igb_acquire_nvm_i210;
-               nvm->ops.release = igb_release_nvm_i210;
-               nvm->ops.read    = igb_read_nvm_srrd_i210;
-               nvm->ops.write   = igb_write_nvm_srwr_i210;
-               nvm->ops.valid_led_default = igb_valid_led_default_i210;
-               break;
-       case e1000_i211:
-               nvm->ops.acquire  = igb_acquire_nvm_i210;
-               nvm->ops.release  = igb_release_nvm_i210;
-               nvm->ops.read     = igb_read_nvm_i211;
-               nvm->ops.valid_led_default = igb_valid_led_default_i210;
-               nvm->ops.validate = NULL;
-               nvm->ops.update   = NULL;
-               nvm->ops.write    = NULL;
                break;
        default:
-               nvm->ops.validate = igb_validate_nvm_checksum;
-               nvm->ops.update = igb_update_nvm_checksum;
-               nvm->ops.acquire = igb_acquire_nvm_82575;
-               nvm->ops.release = igb_release_nvm_82575;
-               if (nvm->word_size < (1 << 15))
-                       nvm->ops.read = igb_read_nvm_eerd;
-               else
-                       nvm->ops.read = igb_read_nvm_spi;
-               nvm->ops.write = igb_write_nvm_spi;
                break;
        }
 
@@ -601,6 +568,15 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw)
 
        /* NVM initialization */
        ret_val = igb_init_nvm_params_82575(hw);
+       switch (hw->mac.type) {
+       case e1000_i210:
+       case e1000_i211:
+               ret_val = igb_init_nvm_params_i210(hw);
+               break;
+       default:
+               break;
+       }
+
        if (ret_val)
                goto out;
 
index aa201abb8ad2809aeadbfbea73f00bc4f913e132..179935576e14e03dd2c172607dc0618af86d3da0 100644 (file)
 #define E1000_EECD_SIZE_EX_SHIFT     11
 #define E1000_EECD_FLUPD_I210          0x00800000 /* Update FLASH */
 #define E1000_EECD_FLUDONE_I210                0x04000000 /* Update FLASH done*/
+#define E1000_EECD_FLASH_DETECTED_I210 0x00080000 /* FLASH detected */
 #define E1000_FLUDONE_ATTEMPTS         20000
 #define E1000_EERD_EEWR_MAX_COUNT      512 /* buffered EEPROM words rw */
 #define E1000_I210_FIFO_SEL_RX         0x00
index 94d7866b9c2086b4d0919711a7b6eec2f889bf20..4329e8c17b332ad286d9c5b5af353d9c55cbdc42 100644 (file)
@@ -110,6 +110,7 @@ enum e1000_nvm_type {
        e1000_nvm_none,
        e1000_nvm_eeprom_spi,
        e1000_nvm_flash_hw,
+       e1000_nvm_invm,
        e1000_nvm_flash_sw
 };
 
index ddb3cf51b9b91825875fa2ecbb84e69fef09dff0..4aebf35a0d75b1f499dd7c82455b32d5c0b40cd0 100644 (file)
@@ -660,6 +660,23 @@ static s32 igb_pool_flash_update_done_i210(struct e1000_hw *hw)
        return ret_val;
 }
 
+/**
+ *  igb_get_flash_presence_i210 - Check if flash device is detected.
+ *  @hw: pointer to the HW structure
+ *
+ **/
+bool igb_get_flash_presence_i210(struct e1000_hw *hw)
+{
+       u32 eec = 0;
+       bool ret_val = false;
+
+       eec = rd32(E1000_EECD);
+       if (eec & E1000_EECD_FLASH_DETECTED_I210)
+               ret_val = true;
+
+       return ret_val;
+}
+
 /**
  *  igb_update_flash_i210 - Commit EEPROM to the flash
  *  @hw: pointer to the HW structure
@@ -786,3 +803,33 @@ s32 igb_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data)
 {
        return __igb_access_xmdio_reg(hw, addr, dev_addr, &data, false);
 }
+
+/**
+ *  igb_init_nvm_params_i210 - Init NVM func ptrs.
+ *  @hw: pointer to the HW structure
+ **/
+s32 igb_init_nvm_params_i210(struct e1000_hw *hw)
+{
+       s32 ret_val = 0;
+       struct e1000_nvm_info *nvm = &hw->nvm;
+
+       nvm->ops.acquire = igb_acquire_nvm_i210;
+       nvm->ops.release = igb_release_nvm_i210;
+       nvm->ops.valid_led_default = igb_valid_led_default_i210;
+
+       /* NVM Function Pointers */
+       if (igb_get_flash_presence_i210(hw)) {
+               hw->nvm.type = e1000_nvm_flash_hw;
+               nvm->ops.read    = igb_read_nvm_srrd_i210;
+               nvm->ops.write   = igb_write_nvm_srwr_i210;
+               nvm->ops.validate = igb_validate_nvm_checksum_i210;
+               nvm->ops.update   = igb_update_nvm_checksum_i210;
+       } else {
+               hw->nvm.type = e1000_nvm_invm;
+               nvm->ops.read     = igb_read_nvm_i211;
+               nvm->ops.write    = NULL;
+               nvm->ops.validate = NULL;
+               nvm->ops.update   = NULL;
+       }
+       return ret_val;
+}
index 5caa332e7556628806491b186ada8e43ec88abf0..a2a1f70cc8dd7ce162512b7f58915a55fcbf8461 100644 (file)
@@ -49,6 +49,8 @@ extern s32 igb_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
                              u16 *data);
 extern s32 igb_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
                               u16 data);
+extern s32 igb_init_nvm_params_i210(struct e1000_hw *hw);
+extern bool igb_get_flash_presence_i210(struct e1000_hw *hw);
 
 #define E1000_STM_OPCODE               0xDB00
 #define E1000_EEPROM_FLASH_SIZE_WORD   0x11