[COMMON] media: smfc: clear JPEG codec state after IRQ

It is guided that MAIN_JPEG_CNTL[1:0] should be cleared after IRQ is
handled.

Change-Id: I83e11b9e7844fc27a4d8e538350ee4ca859e9055
Signed-off-by: Cho KyongHo <pullip.cho@samsung.com>

diff --git a/drivers/media/platform/exynos/smfc/smfc-regs.c b/drivers/media/platform/exynos/smfc/smfc-regs.c
index ac2a1a69d536dc93e1b5904d9e849792b656657a..a8f0db6996a4f3176b409a114ddd948ddd0300b0 100644 (file)
--- a/drivers/media/platform/exynos/smfc/smfc-regs.c
+++ b/drivers/media/platform/exynos/smfc/smfc-regs.c
@@ -325,49 +325,66 @@ void smfc_hwconfigure_start(struct smfc_ctx *ctx,
        cfg = __raw_readl(base + REG_INT_EN);
        __raw_writel(cfg | (1 << 11), base + REG_INT_EN);
 
-       cfg = __raw_readl(base + REG_MAIN_JPEG_CNTL) & ~3;
-       cfg |= !(ctx->flags & SMFC_CTX_COMPRESS) ? 1 : 2;
+       cfg = __raw_readl(base + REG_MAIN_JPEG_CNTL) & ~JPEG_CNTL_CODECON_MASK;
+       cfg |= !(ctx->flags & SMFC_CTX_COMPRESS) ?
+               JPEG_CNTL_CODECON_DECOMPRESS : JPEG_CNTL_CODECON_COMPRESS;
        cfg |= 1 << 19; /* update huffman table from SFR */
-       cfg |= 1 << 28; /* enables interrupt */
+       cfg |= 1 << JPEG_CNTL_INT_EN_SHIFT; /* enable global interrupt */
        cfg |= 1 << 29; /* Release reset */
-       if (hwfc_en)
-               cfg |= 1 << 30; /* Enable OTF mode (default: emulation) */
+       if (hwfc_en) /* Enable OTF mode (default: emulation) */
+               cfg |= 1 << JPEG_CNTL_HWFC_EN_SHIFT;
        if (rst_int != 0)
                cfg |= (rst_int << 3) | (1 << 2);
        if (!!(ctx->flags & SMFC_CTX_B2B_COMPRESS))
-               cfg |= 1 << 31; /* back-to-back enable */
+               cfg |= 1 << JPEG_CNTL_BTB_EN_SHIFT; /* back-to-back enable */
 
        writel(cfg, base + REG_MAIN_JPEG_CNTL);
 }
 
 bool smfc_hwstatus_okay(struct smfc_dev *smfc, struct smfc_ctx *ctx)
 {
-       u32 val = __raw_readl(smfc->reg + REG_MAIN_INT_STATUS);
+       u32 val;
+       bool ret = false;
+
+       /* Disable global interrupt */
+       val = __raw_readl(smfc->reg + REG_MAIN_JPEG_CNTL);
+       val ^= 1 << JPEG_CNTL_INT_EN_SHIFT;
+       __raw_writel(val, smfc->reg + REG_MAIN_JPEG_CNTL);
+
+       val = __raw_readl(smfc->reg + REG_MAIN_INT_STATUS);
        if (!val) {
                dev_err(smfc->dev, "Interrupt with no status change\n");
-               return false;
+               goto err;
        }
 
        if ((val & ~2)) {
                dev_err(smfc->dev, "Error interrupt %#010x\n", val);
-               return false;
+               goto err;
        }
 
        if (!(ctx->flags & SMFC_CTX_B2B_COMPRESS))
-               return  true;
+               goto finish;
+
        val = __raw_readl(smfc->reg + REG_SEC_INT_STATUS);
        if (!val) {
                dev_err(smfc->dev, "Secondary image is not completed\n");
-               return false;
+               goto err;
        }
 
        if ((val & ~2)) {
                dev_err(smfc->dev, "Error interrupt %#010x for the secondary\n",
                        val);
-               return false;
+               goto err;
        }
-
-       return true;
+finish:
+       ret = true;
+err:
+       /* reset codec state to compression/decompression disabled */
+       val = __raw_readl(smfc->reg + REG_MAIN_JPEG_CNTL);
+       val &= ~JPEG_CNTL_RESET_MASK;
+       __raw_writel(val, smfc->reg + REG_MAIN_JPEG_CNTL);
+
+       return ret;
 }
 
 void smfc_dump_registers(struct smfc_dev *smfc)

diff --git a/drivers/media/platform/exynos/smfc/smfc-regs.h b/drivers/media/platform/exynos/smfc/smfc-regs.h
index d0eb77a4c86876999a6a9477fcca35128713b0d8..b5cf6c2f766788131d0dcef922094ba9ff49f1ba 100644 (file)
--- a/drivers/media/platform/exynos/smfc/smfc-regs.h
+++ b/drivers/media/platform/exynos/smfc/smfc-regs.h
@@ -29,6 +29,16 @@
 
 /********** H/W REGISTERS and DEFAULT VALUES **********************************/
 #define REG_MAIN_JPEG_CNTL             0x000
+#  define JPEG_CNTL_CODECON_MASK       3
+#  define JPEG_CNTL_CODECON_COMPRESS   2
+#  define JPEG_CNTL_CODECON_DECOMPRESS 1
+#  define JPEG_CNTL_INT_EN_SHIFT       28
+#  define JPEG_CNTL_HWFC_EN_SHIFT      30
+#  define JPEG_CNTL_BTB_EN_SHIFT       31
+#  define JPEG_CNTL_RESET_MASK         \
+       ((1 <<JPEG_CNTL_HWFC_EN_SHIFT) | (1 << JPEG_CNTL_BTB_EN_SHIFT) | \
+        JPEG_CNTL_CODECON_MASK)
+
 #define REG_INT_EN                     0x004
 #define REG_TIMER_COUNT                        0x008
 #define REG_MAIN_INT_STATUS            0x00C