OMAP2420: hwmod data: Add GPIO
authorVaradarajan, Charulatha <charu@ti.com>
Wed, 8 Dec 2010 00:26:56 +0000 (16:26 -0800)
committerTony Lindgren <tony@atomide.com>
Wed, 8 Dec 2010 00:26:56 +0000 (16:26 -0800)
Add GPIO hwmod data for OMAP2420 and add the required
GPIO device attributes in the gpio header file

Also remove "omap24xx.h" header file as it is not required
anymore.

Signed-off-by: Charulatha V <charu@ti.com>
Acked-by: Benoit Cousson <b-cousson@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap2/omap_hwmod_2420_data.c
arch/arm/plat-omap/include/plat/gpio.h

index a1a3dd6303b44fb27a5e2735c75952a0a4a57ff9..d95342599793458806bfc8fa805eced2a151511e 100644 (file)
@@ -17,7 +17,7 @@
 #include <plat/dma.h>
 #include <plat/serial.h>
 #include <plat/i2c.h>
-#include <plat/omap24xx.h>
+#include <plat/gpio.h>
 
 #include "omap_hwmod_common_data.h"
 
@@ -38,6 +38,10 @@ static struct omap_hwmod omap2420_iva_hwmod;
 static struct omap_hwmod omap2420_l3_main_hwmod;
 static struct omap_hwmod omap2420_l4_core_hwmod;
 static struct omap_hwmod omap2420_wd_timer2_hwmod;
+static struct omap_hwmod omap2420_gpio1_hwmod;
+static struct omap_hwmod omap2420_gpio2_hwmod;
+static struct omap_hwmod omap2420_gpio3_hwmod;
+static struct omap_hwmod omap2420_gpio4_hwmod;
 
 /* L3 -> L4_CORE interface */
 static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = {
@@ -557,6 +561,224 @@ static struct omap_hwmod omap2420_i2c2_hwmod = {
        .flags          = HWMOD_16BIT_REG,
 };
 
+/* l4_wkup -> gpio1 */
+static struct omap_hwmod_addr_space omap2420_gpio1_addr_space[] = {
+       {
+               .pa_start       = 0x48018000,
+               .pa_end         = 0x480181ff,
+               .flags          = ADDR_TYPE_RT
+       },
+};
+
+static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio1 = {
+       .master         = &omap2420_l4_wkup_hwmod,
+       .slave          = &omap2420_gpio1_hwmod,
+       .clk            = "gpios_ick",
+       .addr           = omap2420_gpio1_addr_space,
+       .addr_cnt       = ARRAY_SIZE(omap2420_gpio1_addr_space),
+       .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_wkup -> gpio2 */
+static struct omap_hwmod_addr_space omap2420_gpio2_addr_space[] = {
+       {
+               .pa_start       = 0x4801a000,
+               .pa_end         = 0x4801a1ff,
+               .flags          = ADDR_TYPE_RT
+       },
+};
+
+static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio2 = {
+       .master         = &omap2420_l4_wkup_hwmod,
+       .slave          = &omap2420_gpio2_hwmod,
+       .clk            = "gpios_ick",
+       .addr           = omap2420_gpio2_addr_space,
+       .addr_cnt       = ARRAY_SIZE(omap2420_gpio2_addr_space),
+       .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_wkup -> gpio3 */
+static struct omap_hwmod_addr_space omap2420_gpio3_addr_space[] = {
+       {
+               .pa_start       = 0x4801c000,
+               .pa_end         = 0x4801c1ff,
+               .flags          = ADDR_TYPE_RT
+       },
+};
+
+static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio3 = {
+       .master         = &omap2420_l4_wkup_hwmod,
+       .slave          = &omap2420_gpio3_hwmod,
+       .clk            = "gpios_ick",
+       .addr           = omap2420_gpio3_addr_space,
+       .addr_cnt       = ARRAY_SIZE(omap2420_gpio3_addr_space),
+       .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_wkup -> gpio4 */
+static struct omap_hwmod_addr_space omap2420_gpio4_addr_space[] = {
+       {
+               .pa_start       = 0x4801e000,
+               .pa_end         = 0x4801e1ff,
+               .flags          = ADDR_TYPE_RT
+       },
+};
+
+static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio4 = {
+       .master         = &omap2420_l4_wkup_hwmod,
+       .slave          = &omap2420_gpio4_hwmod,
+       .clk            = "gpios_ick",
+       .addr           = omap2420_gpio4_addr_space,
+       .addr_cnt       = ARRAY_SIZE(omap2420_gpio4_addr_space),
+       .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* gpio dev_attr */
+static struct omap_gpio_dev_attr gpio_dev_attr = {
+       .bank_width = 32,
+       .dbck_flag = false,
+};
+
+static struct omap_hwmod_class_sysconfig omap242x_gpio_sysc = {
+       .rev_offs       = 0x0000,
+       .sysc_offs      = 0x0010,
+       .syss_offs      = 0x0014,
+       .sysc_flags     = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
+                          SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
+       .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+       .sysc_fields    = &omap_hwmod_sysc_type1,
+};
+
+/*
+ * 'gpio' class
+ * general purpose io module
+ */
+static struct omap_hwmod_class omap242x_gpio_hwmod_class = {
+       .name = "gpio",
+       .sysc = &omap242x_gpio_sysc,
+       .rev = 0,
+};
+
+/* gpio1 */
+static struct omap_hwmod_irq_info omap242x_gpio1_irqs[] = {
+       { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */
+};
+
+static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = {
+       &omap2420_l4_wkup__gpio1,
+};
+
+static struct omap_hwmod omap2420_gpio1_hwmod = {
+       .name           = "gpio1",
+       .mpu_irqs       = omap242x_gpio1_irqs,
+       .mpu_irqs_cnt   = ARRAY_SIZE(omap242x_gpio1_irqs),
+       .main_clk       = "gpios_fck",
+       .prcm           = {
+               .omap2 = {
+                       .prcm_reg_id = 1,
+                       .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
+                       .module_offs = WKUP_MOD,
+                       .idlest_reg_id = 1,
+                       .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
+               },
+       },
+       .slaves         = omap2420_gpio1_slaves,
+       .slaves_cnt     = ARRAY_SIZE(omap2420_gpio1_slaves),
+       .class          = &omap242x_gpio_hwmod_class,
+       .dev_attr       = &gpio_dev_attr,
+       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
+};
+
+/* gpio2 */
+static struct omap_hwmod_irq_info omap242x_gpio2_irqs[] = {
+       { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */
+};
+
+static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = {
+       &omap2420_l4_wkup__gpio2,
+};
+
+static struct omap_hwmod omap2420_gpio2_hwmod = {
+       .name           = "gpio2",
+       .mpu_irqs       = omap242x_gpio2_irqs,
+       .mpu_irqs_cnt   = ARRAY_SIZE(omap242x_gpio2_irqs),
+       .main_clk       = "gpios_fck",
+       .prcm           = {
+               .omap2 = {
+                       .prcm_reg_id = 1,
+                       .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
+                       .module_offs = WKUP_MOD,
+                       .idlest_reg_id = 1,
+                       .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
+               },
+       },
+       .slaves         = omap2420_gpio2_slaves,
+       .slaves_cnt     = ARRAY_SIZE(omap2420_gpio2_slaves),
+       .class          = &omap242x_gpio_hwmod_class,
+       .dev_attr       = &gpio_dev_attr,
+       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
+};
+
+/* gpio3 */
+static struct omap_hwmod_irq_info omap242x_gpio3_irqs[] = {
+       { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */
+};
+
+static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = {
+       &omap2420_l4_wkup__gpio3,
+};
+
+static struct omap_hwmod omap2420_gpio3_hwmod = {
+       .name           = "gpio3",
+       .mpu_irqs       = omap242x_gpio3_irqs,
+       .mpu_irqs_cnt   = ARRAY_SIZE(omap242x_gpio3_irqs),
+       .main_clk       = "gpios_fck",
+       .prcm           = {
+               .omap2 = {
+                       .prcm_reg_id = 1,
+                       .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
+                       .module_offs = WKUP_MOD,
+                       .idlest_reg_id = 1,
+                       .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
+               },
+       },
+       .slaves         = omap2420_gpio3_slaves,
+       .slaves_cnt     = ARRAY_SIZE(omap2420_gpio3_slaves),
+       .class          = &omap242x_gpio_hwmod_class,
+       .dev_attr       = &gpio_dev_attr,
+       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
+};
+
+/* gpio4 */
+static struct omap_hwmod_irq_info omap242x_gpio4_irqs[] = {
+       { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */
+};
+
+static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = {
+       &omap2420_l4_wkup__gpio4,
+};
+
+static struct omap_hwmod omap2420_gpio4_hwmod = {
+       .name           = "gpio4",
+       .mpu_irqs       = omap242x_gpio4_irqs,
+       .mpu_irqs_cnt   = ARRAY_SIZE(omap242x_gpio4_irqs),
+       .main_clk       = "gpios_fck",
+       .prcm           = {
+               .omap2 = {
+                       .prcm_reg_id = 1,
+                       .module_bit = OMAP24XX_EN_GPIOS_SHIFT,
+                       .module_offs = WKUP_MOD,
+                       .idlest_reg_id = 1,
+                       .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
+               },
+       },
+       .slaves         = omap2420_gpio4_slaves,
+       .slaves_cnt     = ARRAY_SIZE(omap2420_gpio4_slaves),
+       .class          = &omap242x_gpio_hwmod_class,
+       .dev_attr       = &gpio_dev_attr,
+       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
+};
+
 static __initdata struct omap_hwmod *omap2420_hwmods[] = {
        &omap2420_l3_main_hwmod,
        &omap2420_l4_core_hwmod,
@@ -569,6 +791,12 @@ static __initdata struct omap_hwmod *omap2420_hwmods[] = {
        &omap2420_uart3_hwmod,
        &omap2420_i2c1_hwmod,
        &omap2420_i2c2_hwmod,
+
+       /* gpio class */
+       &omap2420_gpio1_hwmod,
+       &omap2420_gpio2_hwmod,
+       &omap2420_gpio3_hwmod,
+       &omap2420_gpio4_hwmod,
        NULL,
 };
 
index 5bef86d76a6a19a97756feedec9062f22f17679c..24892a6707c44cff7cf9a29ae6de53dd68ff76e7 100644 (file)
 #define METHOD_GPIO_24XX       5
 #define METHOD_GPIO_44XX       6
 
+struct omap_gpio_dev_attr {
+       int bank_width;         /* GPIO bank width */
+       bool dbck_flag;         /* dbck required or not - True for OMAP3&4 */
+};
+
 struct omap_gpio_platform_data {
        u16 virtual_irq_start;
        int bank_type;