dmaengine: omap-dma: move barrier to omap_dma_start_desc()
authorRussell King <rmk+kernel@arm.linux.org.uk>
Wed, 6 Nov 2013 17:15:16 +0000 (17:15 +0000)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 3 Apr 2014 23:30:18 +0000 (00:30 +0100)
We don't need to issue a barrier for every segment of a DMA transfer;
doing this just once per descriptor will do.

Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
drivers/dma/omap-dma.c

index 49609275b2e7743e8fdc2c1c474fb2e2afdc3d95..49b303296d7581f11e3acb547e5ddf820318c4af 100644 (file)
@@ -195,7 +195,6 @@ static void omap_dma_start(struct omap_chan *c, struct omap_desc *d)
 
        val = c->plat->dma_read(CCR, c->dma_ch);
        val |= CCR_ENABLE;
-       mb();
        c->plat->dma_write(val, CCR, c->dma_ch);
 }
 
@@ -301,6 +300,13 @@ static void omap_dma_start_desc(struct omap_chan *c)
        c->desc = d = to_omap_dma_desc(&vd->tx);
        c->sgidx = 0;
 
+       /*
+        * This provides the necessary barrier to ensure data held in
+        * DMA coherent memory is visible to the DMA engine prior to
+        * the transfer starting.
+        */
+       mb();
+
        c->plat->dma_write(d->ccr, CCR, c->dma_ch);
        if (dma_omap1())
                c->plat->dma_write(d->ccr >> 16, CCR2, c->dma_ch);