dts: cvbsout: add clk path config in dts
authorNian Jing <nian.jing@amlogic.com>
Tue, 3 Jul 2018 11:44:10 +0000 (19:44 +0800)
committerYixun Lan <yixun.lan@amlogic.com>
Thu, 5 Jul 2018 08:16:10 +0000 (01:16 -0700)
PD#169489: add clk path config in dts

Change-Id: Id1ee72c9acf4030bff2e9f1c05e1420fdbe52131
Signed-off-by: Nian Jing <nian.jing@amlogic.com>
15 files changed:
arch/arm64/boot/dts/amlogic/g12a_pxp.dts
arch/arm64/boot/dts/amlogic/g12a_s905d2_skt.dts
arch/arm64/boot/dts/amlogic/g12a_s905d2_skt_buildroot.dts
arch/arm64/boot/dts/amlogic/g12a_s905d2_u200.dts
arch/arm64/boot/dts/amlogic/g12a_s905d2_u200_buildroot.dts
arch/arm64/boot/dts/amlogic/g12a_s905d2_u200_drm_buildroot.dts
arch/arm64/boot/dts/amlogic/g12a_s905d2_u220.dts
arch/arm64/boot/dts/amlogic/g12a_s905x2_u211.dts
arch/arm64/boot/dts/amlogic/g12a_s905x2_u211_512m.dts
arch/arm64/boot/dts/amlogic/g12a_s905x2_u211_buildroot.dts
arch/arm64/boot/dts/amlogic/g12a_s905y2_u221.dts
arch/arm64/boot/dts/amlogic/g12b_a311d_skt.dts
arch/arm64/boot/dts/amlogic/g12b_a311d_w400.dts
arch/arm64/boot/dts/amlogic/g12b_pxp.dts
drivers/amlogic/media/vout/cvbs/cvbs_out.c

index f0beb37b47387aed97a67fa2d0fd660e8bf97f9b..99d12281a008dae5a1324cdf2dc8b076bd06d861 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12a */
index 5847c31d1c282a80d727177c5e1f49679695972d..6f4f519f5082ffa94a4bffa226b265538becc62b 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               /* clk path */
+               /* 0:vid_pll vid2_clk */
+               /* 1:gp0_pll vid2_clk */
+               /* 2:vid_pll vid1_clk */
+               /* 3:gp0_pll vid1_clk */
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12a */
index 3817688e55472b1d7d713af5861b576ffb30796a..2c8550e3d49b273e697d5956d585895448bb8252 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12a */
index 215ec971e41a99e682ec64791280d7c4ff792d38..8e59d401094f0bbefdbd88f5b5202a78fe94924f 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               /* clk path */
+               /* 0:vid_pll vid2_clk */
+               /* 1:gp0_pll vid2_clk */
+               /* 2:vid_pll vid1_clk */
+               /* 3:gp0_pll vid1_clk */
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12a */
index 1e26b76aa959582a68f07be094e51c0d002cc54a..abadb3735b7dadd6f5fae3677ba3c76cf77e2e50 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12a */
index 64dff1cb350cda62b84867ac436215a466bd71eb..c2884ea4f88aee2a3fd67d1487a2911afd253c3b 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12a */
index 130fa6e862b2565cdaab9d685170b8a6d5957f5c..1cda17178af5e8d0c6a175d99c0a7bc40ad3f65a 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12a */
index 9d5103b73988e0dc9e2942720db47210b01fd38d..165b1b1c522e1dafba5ddd8c0e8b0b6e42c998a2 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12a */
index 9e6631e846fe9a629bf3892f5c100d54c24cd0ac..f9ccd3af88c0572b8575adc920e36f5062f22e4f 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12a */
index f3e5b2f0c396f480795e7cd1cd677959964c32e4..b41e5433f455cc3b63f4786904beed257dba6fe6 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12a */
index 227a942375a4e55d6963a224f1a96615a097b782..757fec8be09ab2d2ad67ac9b88e3f44873c9b8e1 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12a */
index ee7c8d1760625350c5b63776627b8d0d483b83a1..58d70349eaca347c1ef7f0aeb2281d0b46cd0447 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12b */
index 36bf70e5ab5a225ee4d241b41325d55efcd4f713..8c590fdcebe065c3c8a7954485ccfca906f4d65f 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               /* clk path */
+               /* 0:vid_pll vid2_clk */
+               /* 1:gp0_pll vid2_clk */
+               /* 2:vid_pll vid1_clk */
+               /* 3:gp0_pll vid1_clk */
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12b */
index b511c302dc7c6c31034e2a816bdb75312936037f..f79266588ac23eac09ea84e2faf0ce251a5d744a 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12b */
index 8633c900236605d2b5f0b3d17b4a883b878a14b5..4c735f78202cc31274e3ff159af7a2d6d42ae912 100644 (file)
@@ -1326,6 +1326,21 @@ static void cvbsout_get_config(struct device *dev)
                }
        }
 
+       /*clk path*/
+       /*0:vid_pll vid2_clk*/
+       /*1:gp0_pll vid2_clk*/
+       /*2:vid_pll vid1_clk*/
+       /*3:gp0_pll vid1_clk*/
+       ret = of_property_read_u32(dev->of_node, "clk_path", &val);
+       if (ret)
+               cvbs_log_info("clk_path config null\n");
+       else if (val > 3)
+               cvbs_log_err("error: invalid clk_path\n");
+       else {
+               cvbs_clk_path = val;
+               cvbs_log_info("clk path:%d\n", cvbs_clk_path);
+       }
+
        /* vdac config */
        ret = of_property_read_u32(dev->of_node, "vdac_config", &val);
        if (ret)