drm/i915: vlv: s/spin_lock_irqsave/spin_lock/ in irq handler
authorImre Deak <imre.deak@intel.com>
Tue, 4 Feb 2014 19:35:47 +0000 (21:35 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 5 Feb 2014 16:06:42 +0000 (17:06 +0100)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_irq.c

index a34714de7968e229a655e3d2b3c3454e7847ddf6..a9916e2512d49d6d4fd3afa6a95466f59f445cae 100644 (file)
@@ -1481,10 +1481,9 @@ static void valleyview_pipestat_irq_handler(struct drm_device *dev, u32 iir)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
        u32 pipe_stats[I915_MAX_PIPES];
-       unsigned long irqflags;
        int pipe;
 
-       spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
+       spin_lock(&dev_priv->irq_lock);
        for_each_pipe(pipe) {
                int reg = PIPESTAT(pipe);
                pipe_stats[pipe] = I915_READ(reg);
@@ -1495,7 +1494,7 @@ static void valleyview_pipestat_irq_handler(struct drm_device *dev, u32 iir)
                if (pipe_stats[pipe] & 0x8000ffff)
                        I915_WRITE(reg, pipe_stats[pipe]);
        }
-       spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
+       spin_unlock(&dev_priv->irq_lock);
 
        for_each_pipe(pipe) {
                if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS)