[PATCH] msi: support masking msi irqs without a mask bit
authorEric W. Biederman <ebiederm@xmission.com>
Mon, 5 Mar 2007 08:30:11 +0000 (00:30 -0800)
committerLinus Torvalds <torvalds@woody.linux-foundation.org>
Mon, 5 Mar 2007 15:57:50 +0000 (07:57 -0800)
For devices that do not support msi-x we only support 1 interrupt.  Therefore
we can disable that one interrupt by disabling the msi capability itself.  If
we leave the intx interrupts disabled while we have the msi capability
disabled no interrupts should be delivered from that device.

Devices with just the minimal msi support (and thus hitting this code path)
include things like the intel e1000 nic, so it looks like is going to be a
fairly common case and thus important to get right.

Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Cc: Michael Ellerman <michael@ellerman.id.au>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Greg KH <greg@kroah.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
drivers/pci/msi.c

index c43e7d22e180ad92143e763fab9f6598fe7209b5..01869b1782e4c460affcd7d655a340f620e9e7a8 100644 (file)
@@ -85,6 +85,8 @@ static void msi_set_mask_bit(unsigned int irq, int flag)
                        mask_bits &= ~(1);
                        mask_bits |= flag;
                        pci_write_config_dword(entry->dev, pos, mask_bits);
+               } else {
+                       msi_set_enable(entry->dev, !flag);
                }
                break;
        case PCI_CAP_ID_MSIX: