powerpc/dts: Add node(s) for the platform PLL
authorEmil Medve <Emilian.Medve@freescale.com>
Thu, 6 Nov 2014 15:48:13 +0000 (09:48 -0600)
committerScott Wood <scottwood@freescale.com>
Sat, 8 Nov 2014 00:10:50 +0000 (18:10 -0600)
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Change-Id: If76cd705a01813abe53396c1486bc13c4289ee92
Signed-off-by: Scott Wood <scottwood@freescale.com>
arch/powerpc/boot/dts/fsl/qoriq-clockgen1.dtsi
arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi

index 48710482806e5315ed775d8fcfa4808c2ea6fc0e..4ece1edbff6362a169b51ed99bf22ca8e18e6e42 100644 (file)
@@ -75,4 +75,11 @@ global-utilities@e1000 {
                clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
                clock-output-names = "cmux1";
        };
+       platform_pll: platform-pll@c00 {
+               #clock-cells = <1>;
+               reg = <0xc00 0x4>;
+               compatible = "fsl,qoriq-platform-pll-1.0";
+               clocks = <&sysclk>;
+               clock-output-names = "platform-pll", "platform-pll-div2";
+       };
 };
index 5d18d2a6cf52d949134f0128debf5da54007a307..48e0b6e4ce33c06946f543f59b150b7eaabd353c 100644 (file)
@@ -58,4 +58,11 @@ global-utilities@e1000 {
                clocks = <&sysclk>;
                clock-output-names = "pll1", "pll1-div2", "pll1-div4";
        };
+       platform_pll: platform-pll@c00 {
+               #clock-cells = <1>;
+               reg = <0xc00 0x4>;
+               compatible = "fsl,qoriq-platform-pll-2.0";
+               clocks = <&sysclk>;
+               clock-output-names = "platform-pll", "platform-pll-div2";
+       };
 };