/* Set the dither control */
writel(0x70, par->vid_regs + GX_FP_DFC);
- /* Turn on the device */
+ /* Enable the FP data and power (in case the BIOS didn't) */
+
+ fp = readl(par->vid_regs + GX_DCFG);
+ fp |= GX_DCFG_FP_PWR_EN | GX_DCFG_FP_DATA_EN;
+ writel(fp, par->vid_regs + GX_DCFG);
+
+ /* Unblank the panel */
fp = readl(par->vid_regs + GX_FP_PM);
fp |= GX_FP_PM_P;
writel(misc, par->vid_regs + GX_MISC);
/* Write the display configuration */
-
dcfg = readl(par->vid_regs + GX_DCFG);
+ /* Disable hsync and vsync */
+ dcfg &= ~(GX_DCFG_VSYNC_EN | GX_DCFG_HSYNC_EN);
+ writel(dcfg, par->vid_regs + GX_DCFG);
+
/* Clear bits from existing mode. */
dcfg &= ~(GX_DCFG_CRT_SYNC_SKW_MASK
| GX_DCFG_CRT_HSYNC_POL | GX_DCFG_CRT_VSYNC_POL
# define GX_DCFG_HSYNC_EN 0x00000002
# define GX_DCFG_VSYNC_EN 0x00000004
# define GX_DCFG_DAC_BL_EN 0x00000008
+# define GX_DCFG_FP_PWR_EN 0x00000040
+# define GX_DCFG_FP_DATA_EN 0x00000080
# define GX_DCFG_CRT_HSYNC_POL 0x00000100
# define GX_DCFG_CRT_VSYNC_POL 0x00000200
# define GX_DCFG_CRT_SYNC_SKW_MASK 0x0001C000