PCI: rcar: Add Gen2 PHY setup to pcie-rcar

For PCIe compliance, the PHY registers need setting as per the manual.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
index f157b50ee42b9bbf44735915fadb0eed08c5613b..d6f140aa2efeec4c136c47be45103517d8423bc1 100644 (file)
--- a/drivers/pci/host/pcie-rcar.c
+++ b/drivers/pci/host/pcie-rcar.c
@@ -95,6 +95,11 @@
 #define H1_PCIEPHYDOUTR                0x040014
 #define H1_PCIEPHYSR           0x040018
 
+/* R-Car Gen2 PHY */
+#define GEN2_PCIEPHYADDR       0x780
+#define GEN2_PCIEPHYDATA       0x784
+#define GEN2_PCIEPHYCTRL       0x78c
+
 #define INT_PCI_MSI_NR 32
 
 #define RCONF(x)       (PCICONF(0)+(x))
@@ -568,6 +573,26 @@ static int rcar_pcie_hw_init_h1(struct rcar_pcie *pcie)
        return -ETIMEDOUT;
 }
 
+static int rcar_pcie_hw_init_gen2(struct rcar_pcie *pcie)
+{
+       /*
+        * These settings come from the R-Car Series, 2nd Generation User's
+        * Manual, section 50.3.1 (2) Initialization of the physical layer.
+        */
+       rcar_pci_write_reg(pcie, 0x000f0030, GEN2_PCIEPHYADDR);
+       rcar_pci_write_reg(pcie, 0x00381203, GEN2_PCIEPHYDATA);
+       rcar_pci_write_reg(pcie, 0x00000001, GEN2_PCIEPHYCTRL);
+       rcar_pci_write_reg(pcie, 0x00000006, GEN2_PCIEPHYCTRL);
+
+       rcar_pci_write_reg(pcie, 0x000f0054, GEN2_PCIEPHYADDR);
+       /* The following value is for DC connection, no termination resistor */
+       rcar_pci_write_reg(pcie, 0x13802007, GEN2_PCIEPHYDATA);
+       rcar_pci_write_reg(pcie, 0x00000001, GEN2_PCIEPHYCTRL);
+       rcar_pci_write_reg(pcie, 0x00000006, GEN2_PCIEPHYCTRL);
+
+       return rcar_pcie_hw_init(pcie);
+}
+
 static int rcar_msi_alloc(struct rcar_msi *chip)
 {
        int msi;
@@ -907,9 +932,9 @@ static int rcar_pcie_parse_map_dma_ranges(struct rcar_pcie *pcie,
 
 static const struct of_device_id rcar_pcie_of_match[] = {
        { .compatible = "renesas,pcie-r8a7779", .data = rcar_pcie_hw_init_h1 },
-       { .compatible = "renesas,pcie-rcar-gen2", .data = rcar_pcie_hw_init },
-       { .compatible = "renesas,pcie-r8a7790", .data = rcar_pcie_hw_init },
-       { .compatible = "renesas,pcie-r8a7791", .data = rcar_pcie_hw_init },
+       { .compatible = "renesas,pcie-rcar-gen2", .data = rcar_pcie_hw_init_gen2 },
+       { .compatible = "renesas,pcie-r8a7790", .data = rcar_pcie_hw_init_gen2 },
+       { .compatible = "renesas,pcie-r8a7791", .data = rcar_pcie_hw_init_gen2 },
        { .compatible = "renesas,pcie-r8a7795", .data = rcar_pcie_hw_init },
        {},
 };