[COMMON] thermal: samsung: Parse dyn_coeff from ECT
authorHyeonseong Gil <hs.gil@samsung.com>
Fri, 7 Apr 2017 02:18:28 +0000 (11:18 +0900)
committerChungwoo Park <cww.park@samsung.com>
Mon, 21 May 2018 08:18:40 +0000 (17:18 +0900)
Change-Id: I92d7a36ff94c95c189e188145a3846bd6e63bcd0
Signed-off-by: Hyeonseong Gil <hs.gil@samsung.com>
drivers/thermal/cpu_cooling.c
drivers/thermal/gpu_cooling.c

index 62edf361912e5fd13bc1529c1097cce01b0d340f..12b4be2c10be1333a5583f29cdf9e7f7554769ab 100644 (file)
@@ -1123,6 +1123,9 @@ exynos_cpufreq_cooling_register(const struct cpumask *clip_cpus)
 {
        struct device *dev;
        struct device_node *np;
+       struct thermal_zone_device *tz;
+       void *gen_block;
+       struct ect_gen_param_table *pwr_coeff;
        u32 capacitance = 0;
 
        dev = get_cpu_device(cpumask_first(clip_cpus));
@@ -1135,6 +1138,25 @@ exynos_cpufreq_cooling_register(const struct cpumask *clip_cpus)
        if (!np)
                return ERR_PTR(-EINVAL);
 
+       tz = thermal_zone_get_zone_by_cool_np(np);
+
+       if (tz) {
+               gen_block = ect_get_block("GEN");
+               if (gen_block == NULL) {
+                       pr_err("%s: Failed to get gen block from ECT\n", __func__);
+                       goto regist;
+               }
+               pwr_coeff = ect_gen_param_get_table(gen_block, "DTM_PWR_Coeff");
+               if (pwr_coeff == NULL) {
+                       pr_err("%s: Failed to get power coeff from ECT\n", __func__);
+                       goto regist;
+               }
+               capacitance = pwr_coeff->parameter[tz->id];
+       } else {
+               pr_err("%s: could not find thermal zone\n", __func__);
+       }
+
+regist:
        return __cpufreq_cooling_register(np, clip_cpus, capacitance,
                                NULL);
 }
index e54cf71865ab49a5093c2b45bf2edcd6df998aa5..25b07fe420a288fc2ff089458900d3c2b854a064 100644 (file)
@@ -1079,6 +1079,10 @@ static int __init exynos_gpu_cooling_init(void)
 {
        struct device_node *np;
        struct thermal_cooling_device *dev;
+       struct thermal_zone_device *tz;
+       void *gen_block;
+       struct ect_gen_param_table *pwr_coeff;
+       u32 capacitance = 0;
        int ret = 0;
 
        ret = gpu_cooling_table_init();
@@ -1095,7 +1099,26 @@ static int __init exynos_gpu_cooling_init(void)
                return -EINVAL;
        }
 
-       dev = __gpufreq_cooling_register(np, NULL, 0, NULL);
+       tz = thermal_zone_get_zone_by_cool_np(np);
+
+       if (tz) {
+               gen_block = ect_get_block("GEN");
+               if (gen_block == NULL) {
+                       pr_err("%s: Failed to get gen block from ECT\n", __func__);
+                       goto regist;
+               }
+               pwr_coeff = ect_gen_param_get_table(gen_block, "DTM_PWR_Coeff");
+               if (pwr_coeff == NULL) {
+                       pr_err("%s: Failed to get power coeff from ECT\n", __func__);
+                       goto regist;
+               }
+               capacitance = pwr_coeff->parameter[tz->id];
+       } else {
+               pr_err("%s: could not find thermal zone\n", __func__);
+       }
+
+regist:
+       dev = __gpufreq_cooling_register(np, NULL, capacitance, NULL);
 
        if (IS_ERR(dev)) {
                pr_err("Fail to register gpufreq cooling\n");