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raw | patch | inline | side by side (parent: 547c84b)
gpu: fixed hiu bus addr on 4.9 kernel[1/2]
authorJiyu Yang <jiyu.yang@amlogic.com>
Mon, 22 Jan 2018 06:18:03 +0000 (14:18 +0800)
committerSimon Zheng <simon.zheng@amlogic.com>
Thu, 8 Mar 2018 10:48:46 +0000 (02:48 -0800)
PD#159303: this may cause the suspend to ram crash at mali modules

Change-Id: Ic328f8abca4a39bdb1321f379fbfc63626f6e875

midgard/r11p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c patch | blob | blame | history
midgard/r12p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c patch | blob | blame | history
midgard/r14p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c patch | blob | blame | history
midgard/r15p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c patch | blob | blame | history
midgard/r16p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c patch | blob | blame | history
t83x/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c patch | blob | blame | history
utgard/platform/meson_bu/mali_clock.c patch | blob | blame | history

diff --git a/midgard/r11p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c b/midgard/r11p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
index 26bd614ac8770986aa9dc7928818d9e8d0c1113e..35249a50cef4bfa80f873071cfc02188b19bd928 100644 (file)
--- a/midgard/r11p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
+++ b/midgard/r11p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
@@ -506,7 +506,7 @@ int mali_dt_info(struct platform_device *pdev, struct mali_plat_info_t *mpdata)
        mpdata->scale_info.minclk = mpdata->cfg_min_clock;
        _dev_info(&pdev->dev, "min clk  is %d\n", mpdata->scale_info.minclk);
 
-       mpdata->reg_base_hiubus = of_iomap(gpu_dn, 1);
+       mpdata->reg_base_hiubus = of_iomap(gpu_dn, 3);
        _dev_info(&pdev->dev, "hiu io source  0x%p\n", mpdata->reg_base_hiubus);
 
        mpdata->reg_base_aobus = of_iomap(gpu_dn, 2);
diff --git a/midgard/r12p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c b/midgard/r12p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
index 26bd614ac8770986aa9dc7928818d9e8d0c1113e..35249a50cef4bfa80f873071cfc02188b19bd928 100644 (file)
--- a/midgard/r12p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
+++ b/midgard/r12p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
@@ -506,7 +506,7 @@ int mali_dt_info(struct platform_device *pdev, struct mali_plat_info_t *mpdata)
        mpdata->scale_info.minclk = mpdata->cfg_min_clock;
        _dev_info(&pdev->dev, "min clk  is %d\n", mpdata->scale_info.minclk);
 
-       mpdata->reg_base_hiubus = of_iomap(gpu_dn, 1);
+       mpdata->reg_base_hiubus = of_iomap(gpu_dn, 3);
        _dev_info(&pdev->dev, "hiu io source  0x%p\n", mpdata->reg_base_hiubus);
 
        mpdata->reg_base_aobus = of_iomap(gpu_dn, 2);
diff --git a/midgard/r14p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c b/midgard/r14p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
index 26bd614ac8770986aa9dc7928818d9e8d0c1113e..35249a50cef4bfa80f873071cfc02188b19bd928 100644 (file)
--- a/midgard/r14p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
+++ b/midgard/r14p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
@@ -506,7 +506,7 @@ int mali_dt_info(struct platform_device *pdev, struct mali_plat_info_t *mpdata)
        mpdata->scale_info.minclk = mpdata->cfg_min_clock;
        _dev_info(&pdev->dev, "min clk  is %d\n", mpdata->scale_info.minclk);
 
-       mpdata->reg_base_hiubus = of_iomap(gpu_dn, 1);
+       mpdata->reg_base_hiubus = of_iomap(gpu_dn, 3);
        _dev_info(&pdev->dev, "hiu io source  0x%p\n", mpdata->reg_base_hiubus);
 
        mpdata->reg_base_aobus = of_iomap(gpu_dn, 2);
diff --git a/midgard/r15p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c b/midgard/r15p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
index 26bd614ac8770986aa9dc7928818d9e8d0c1113e..35249a50cef4bfa80f873071cfc02188b19bd928 100644 (file)
--- a/midgard/r15p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
+++ b/midgard/r15p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
@@ -506,7 +506,7 @@ int mali_dt_info(struct platform_device *pdev, struct mali_plat_info_t *mpdata)
        mpdata->scale_info.minclk = mpdata->cfg_min_clock;
        _dev_info(&pdev->dev, "min clk  is %d\n", mpdata->scale_info.minclk);
 
-       mpdata->reg_base_hiubus = of_iomap(gpu_dn, 1);
+       mpdata->reg_base_hiubus = of_iomap(gpu_dn, 3);
        _dev_info(&pdev->dev, "hiu io source  0x%p\n", mpdata->reg_base_hiubus);
 
        mpdata->reg_base_aobus = of_iomap(gpu_dn, 2);
diff --git a/midgard/r16p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c b/midgard/r16p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
index 26bd614ac8770986aa9dc7928818d9e8d0c1113e..35249a50cef4bfa80f873071cfc02188b19bd928 100644 (file)
--- a/midgard/r16p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
+++ b/midgard/r16p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
@@ -506,7 +506,7 @@ int mali_dt_info(struct platform_device *pdev, struct mali_plat_info_t *mpdata)
        mpdata->scale_info.minclk = mpdata->cfg_min_clock;
        _dev_info(&pdev->dev, "min clk  is %d\n", mpdata->scale_info.minclk);
 
-       mpdata->reg_base_hiubus = of_iomap(gpu_dn, 1);
+       mpdata->reg_base_hiubus = of_iomap(gpu_dn, 3);
        _dev_info(&pdev->dev, "hiu io source  0x%p\n", mpdata->reg_base_hiubus);
 
        mpdata->reg_base_aobus = of_iomap(gpu_dn, 2);
diff --git a/t83x/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c b/t83x/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
index 26bd614ac8770986aa9dc7928818d9e8d0c1113e..35249a50cef4bfa80f873071cfc02188b19bd928 100644 (file)
--- a/t83x/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
+++ b/t83x/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
@@ -506,7 +506,7 @@ int mali_dt_info(struct platform_device *pdev, struct mali_plat_info_t *mpdata)
        mpdata->scale_info.minclk = mpdata->cfg_min_clock;
        _dev_info(&pdev->dev, "min clk  is %d\n", mpdata->scale_info.minclk);
 
-       mpdata->reg_base_hiubus = of_iomap(gpu_dn, 1);
+       mpdata->reg_base_hiubus = of_iomap(gpu_dn, 3);
        _dev_info(&pdev->dev, "hiu io source  0x%p\n", mpdata->reg_base_hiubus);
 
        mpdata->reg_base_aobus = of_iomap(gpu_dn, 2);
diff --git a/utgard/platform/meson_bu/mali_clock.c b/utgard/platform/meson_bu/mali_clock.c
index 18076acef1c53e847e953b0c21fc6654b3c89058..b208f3d1a37f64f6599b3fee6f4bbf0a9c4d862e 100644 (file)
--- a/utgard/platform/meson_bu/mali_clock.c
+++ b/utgard/platform/meson_bu/mali_clock.c
@@ -236,7 +236,7 @@ int mali_dt_info(struct platform_device *pdev, struct mali_plat_info_t *mpdata)
        mpdata->scale_info.minclk = mpdata->cfg_min_clock;
        _dev_info(&pdev->dev, "min clk  is %d\n", mpdata->scale_info.minclk);
 
-       mpdata->reg_base_hiubus = of_iomap(gpu_dn, 1);
+       mpdata->reg_base_hiubus = of_iomap(gpu_dn, 3);
        _dev_info(&pdev->dev, "hiu io source  0x%p\n", mpdata->reg_base_hiubus);
 
        mpdata->reg_base_aobus = of_iomap(gpu_dn, 2);
@@ -527,7 +527,7 @@ int mali_dt_info(struct platform_device *pdev, struct mali_plat_info_t *mpdata)
        mpdata->scale_info.minclk = mpdata->cfg_min_clock;
        _dev_info(&pdev->dev, "min clk  is %d\n", mpdata->scale_info.minclk);
 
-       mpdata->reg_base_hiubus = of_iomap(gpu_dn, 1);
+       mpdata->reg_base_hiubus = of_iomap(gpu_dn, 3);
        _dev_info(&pdev->dev, "hiu io source  0x%p\n", mpdata->reg_base_hiubus);
 
        mpdata->reg_base_aobus = of_iomap(gpu_dn, 2);