#define INTERNAL_MEM_SIZE 0x400 /* 1024 of internal memory */
#define INTERNAL_MEM_RX_OFFSET 0x1FF /* 50% Tx, 50% Rx */
-#define REGS_MAX_ARRAY 4096
-
/*
* For interrupts, normal running is:
* rxdma_xfr_done, phy_interrupt, mac_stat_interrupt,
#define INT_MASK_ENABLE 0xfffebf17
#define INT_MASK_ENABLE_NO_FLOW 0xfffebfd7
-/* DATA STRUCTURES FOR DIRECT REGISTER ACCESS */
-
-typedef struct {
- u8 bReadWrite;
- u32 nRegCount;
- u32 nData[REGS_MAX_ARRAY];
- u32 nOffsets[REGS_MAX_ARRAY];
-} JAGCORE_ACCESS_REGS, *PJAGCORE_ACCESS_REGS;
-
-typedef struct {
- u8 bReadWrite;
- u32 nDataWidth;
- u32 nRegCount;
- u32 nOffsets[REGS_MAX_ARRAY];
- u32 nData[REGS_MAX_ARRAY];
-} PCI_CFG_SPACE_REGS, *PPCI_CFG_SPACE_REGS;
-
/* Forward declaration of the private adapter structure */
struct et131x_adapter;
/* Rx Memory Variables */
RX_RING_t RxRing;
- /* ET1310 register Access */
- JAGCORE_ACCESS_REGS JagCoreRegs;
- PCI_CFG_SPACE_REGS PciCfgRegs;
-
/* Loopback specifics */
u8 ReplicaPhyLoopbk; /* Replica Enable */
u8 ReplicaPhyLoopbkPF; /* Replica Enable Pass/Fail */