iwlagn: move ucode_write_complete from priv to trans structure
authorDon Fry <donald.h.fry@intel.com>
Thu, 10 Nov 2011 14:55:07 +0000 (06:55 -0800)
committerJohn W. Linville <linville@tuxdriver.com>
Fri, 11 Nov 2011 17:32:53 +0000 (12:32 -0500)
ucode_write_complete is used for ucode loading.  Move it as part of
restructuring work out of the priv structure.

Signed-off-by: Don Fry <donald.h.fry@intel.com>
Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/iwlwifi/iwl-agn-ucode.c
drivers/net/wireless/iwlwifi/iwl-dev.h
drivers/net/wireless/iwlwifi/iwl-trans-pcie-rx.c
drivers/net/wireless/iwlwifi/iwl-trans.h

index 8ba0dd54e37d4faee68bb900a1e99fb5de6543d6..502659afe1fb2289f47ba340dd457d28e21df806 100644 (file)
@@ -75,48 +75,49 @@ static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
 /*
  * ucode
  */
-static int iwlagn_load_section(struct iwl_priv *priv, const char *name,
+static int iwlagn_load_section(struct iwl_trans *trans, const char *name,
                                struct fw_desc *image, u32 dst_addr)
 {
+       struct iwl_bus *bus = bus(trans);
        dma_addr_t phy_addr = image->p_addr;
        u32 byte_cnt = image->len;
        int ret;
 
-       priv->ucode_write_complete = 0;
+       trans->ucode_write_complete = 0;
 
-       iwl_write_direct32(bus(priv),
+       iwl_write_direct32(bus,
                FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
                FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE);
 
-       iwl_write_direct32(bus(priv),
+       iwl_write_direct32(bus,
                FH_SRVC_CHNL_SRAM_ADDR_REG(FH_SRVC_CHNL), dst_addr);
 
-       iwl_write_direct32(bus(priv),
+       iwl_write_direct32(bus,
                FH_TFDIB_CTRL0_REG(FH_SRVC_CHNL),
                phy_addr & FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK);
 
-       iwl_write_direct32(bus(priv),
+       iwl_write_direct32(bus,
                FH_TFDIB_CTRL1_REG(FH_SRVC_CHNL),
                (iwl_get_dma_hi_addr(phy_addr)
                        << FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_cnt);
 
-       iwl_write_direct32(bus(priv),
+       iwl_write_direct32(bus,
                FH_TCSR_CHNL_TX_BUF_STS_REG(FH_SRVC_CHNL),
                1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM |
                1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX |
                FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID);
 
-       iwl_write_direct32(bus(priv),
+       iwl_write_direct32(bus,
                FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
                FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE       |
                FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE    |
                FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD);
 
-       IWL_DEBUG_FW(priv, "%s uCode section being loaded...\n", name);
-       ret = wait_event_timeout(priv->shrd->wait_command_queue,
-                                priv->ucode_write_complete, 5 * HZ);
+       IWL_DEBUG_FW(bus, "%s uCode section being loaded...\n", name);
+       ret = wait_event_timeout(trans->shrd->wait_command_queue,
+                                trans->ucode_write_complete, 5 * HZ);
        if (!ret) {
-               IWL_ERR(priv, "Could not load the %s uCode section\n",
+               IWL_ERR(trans, "Could not load the %s uCode section\n",
                        name);
                return -ETIMEDOUT;
        }
@@ -129,12 +130,12 @@ static int iwlagn_load_given_ucode(struct iwl_priv *priv,
 {
        int ret = 0;
 
-       ret = iwlagn_load_section(priv, "INST", &image->code,
+       ret = iwlagn_load_section(trans(priv), "INST", &image->code,
                                   IWLAGN_RTC_INST_LOWER_BOUND);
        if (ret)
                return ret;
 
-       return iwlagn_load_section(priv, "DATA", &image->data,
+       return iwlagn_load_section(trans(priv), "DATA", &image->data,
                                    IWLAGN_RTC_DATA_LOWER_BOUND);
 }
 
index ef8620b10bbc2fb2912908c3abda24d243bb937a..4279e01acc4928fb6be45df7b5dc231848bf9330 100644 (file)
@@ -920,7 +920,6 @@ struct iwl_priv {
        struct fw_img ucode_wowlan;
 
        enum iwlagn_ucode_type ucode_type;
-       u8 ucode_write_complete;        /* the image write is complete */
        char firmware_name[25];
 
        struct iwl_rxon_context contexts[NUM_IWL_RXON_CTX];
index 374c68cc1d705dca84ed42d75714524f3e0569b1..ee126f844a5c412f8eafaf32ea0b5e7daecfbd55 100644 (file)
@@ -1108,7 +1108,7 @@ void iwl_irq_tasklet(struct iwl_trans *trans)
                isr_stats->tx++;
                handled |= CSR_INT_BIT_FH_TX;
                /* Wake up uCode load routine, now that load is complete */
-               priv(trans)->ucode_write_complete = 1;
+               trans->ucode_write_complete = 1;
                wake_up(&trans->shrd->wait_command_queue);
        }
 
index c5923125c3f96bb8fe7625e2b59e0ba1cde4b8d7..34b817f48a2746bdf6f24d161e30f19d83295f7c 100644 (file)
@@ -212,12 +212,15 @@ struct iwl_trans_ops {
  * @ops - pointer to iwl_trans_ops
  * @shrd - pointer to iwl_shared which holds shared data from the upper layer
  * @hcmd_lock: protects HCMD
+ * @ucode_write_complete: indicates that the ucode has been copied.
  */
 struct iwl_trans {
        const struct iwl_trans_ops *ops;
        struct iwl_shared *shrd;
        spinlock_t hcmd_lock;
 
+       u8 ucode_write_complete;        /* the image write is complete */
+
        /* pointer to trans specific struct */
        /*Ensure that this pointer will always be aligned to sizeof pointer */
        char trans_specific[0] __attribute__((__aligned__(sizeof(void *))));