ARM: dts: r8a7792: add IRQC support

Describe the IRQC interrupt controller in the R8A7792 device tree.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index b6e34b431a51c0b8bdd96c1063d8aca7f5b26cd9..18b4e50521c3033eccfdaa068cd709213bc2b39d 100644 (file)
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -61,6 +61,19 @@
                                      IRQ_TYPE_LEVEL_HIGH)>;
                };
 
+               irqc: interrupt-controller@e61c0000 {
+                       compatible = "renesas,irqc-r8a7792", "renesas,irqc";
+                       #interrupt-cells = <2>;
+                       interrupt-controller;
+                       reg = <0 0xe61c0000 0 0x200>;
+                       interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&mstp4_clks R8A7792_CLK_IRQC>;
+                       power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+               };
+
                timer {
                        compatible = "arm,armv7-timer";
                        interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |