ARM: dts: NSP: Add dma-coherent to relevant DT entries
authorJon Mason <jon.mason@broadcom.com>
Mon, 31 Jul 2017 21:54:21 +0000 (17:54 -0400)
committerFlorian Fainelli <f.fainelli@gmail.com>
Mon, 7 Aug 2017 17:31:59 +0000 (10:31 -0700)
Cache related issues with DMA rings and performance issues related to
caching are being caused by not properly setting the "dma-coherent" flag
in the device tree entries.  Adding it here to correct the issue.

Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Fixes: 3107fa5bcfb2 ("ARM: dts: NSP: Add SD/MMC support")
Fixes: 13d04f20935c ("ARM: dts: NSP: Add AMAC entries")
Fixes: 5aeda7bf8a1e ("ARM: dts: NSP: Add and enable amac2")
Fixes: 17d517172300 ("ARM: dts: NSP: Add mailbox (PDC) to NSP")
Fixes: 1d8ece6639e1 ("ARM: dts: NSP: Add EHCI/OHCI USB nodes to device tree")
Fixes: 0f9f27a36d09 ("ARM: dts: NSP: Add I2C support to the DT")
Fixes: 8dbcad020f2e ("ARM: dts: nsp: Add sata device tree entry")
Fixes: 522199029fdc ("ARM: dts: NSP: Fix PCIE DT issue")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
arch/arm/boot/dts/bcm-nsp.dtsi

index 7204d1def23df1c5712bc9a559a599392ffef4b7..c82313a677d9fb13f8c772e46a3663e99716d375 100644 (file)
                        interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
                        sdhci,auto-cmd12;
                        clocks = <&lcpll0 BCM_NSP_LCPLL0_SDIO_CLK>;
+                       dma-coherent;
                        status = "disabled";
                };
 
                              <0x110000 0x1000>;
                        reg-names = "amac_base", "idm_base";
                        interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+                       dma-coherent;
                        status = "disabled";
                };
 
                              <0x111000 0x1000>;
                        reg-names = "amac_base", "idm_base";
                        interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+                       dma-coherent;
                        status = "disabled";
                };
 
                              <0x112000 0x1000>;
                        reg-names = "amac_base", "idm_base";
                        interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+                       dma-coherent;
                        status = "disabled";
                };
 
                        #mbox-cells = <1>;
                        brcm,rx-status-len = <32>;
                        brcm,use-bcm-hdr;
+                       dma-coherent;
                };
 
                nand: nand@26000 {
                        compatible = "generic-ehci";
                        reg = <0x2a000 0x100>;
                        interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+                       dma-coherent;
                        status = "disabled";
                };
 
                        compatible = "generic-ohci";
                        reg = <0x2b000 0x100>;
                        interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+                       dma-coherent;
                        status = "disabled";
                };
 
                        #size-cells = <0>;
                        interrupts = <GIC_SPI 89 IRQ_TYPE_NONE>;
                        clock-frequency = <100000>;
+                       dma-coherent;
                        status = "disabled";
                };
 
                        interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
+                       dma-coherent;
                        status = "disabled";
 
                        sata0: sata-port@0 {
                 */
                ranges = <0x82000000 0 0x08000000 0x08000000 0 0x8000000>;
 
+               dma-coherent;
                status = "disabled";
 
                msi-parent = <&msi0>;
                 */
                ranges = <0x82000000 0 0x40000000 0x40000000 0 0x8000000>;
 
+               dma-coherent;
                status = "disabled";
 
                msi-parent = <&msi1>;
                 */
                ranges = <0x82000000 0 0x48000000 0x48000000 0 0x8000000>;
 
+               dma-coherent;
                status = "disabled";
 
                msi-parent = <&msi2>;