ARM: zynq: Introduce zynq_slcr_unlock()

Call special function for unlocking SLCR.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/mach-zynq/slcr.c b/arch/arm/mach-zynq/slcr.c
index ab85f4e8edb08e5d4d2995c3bb99e50a90bda9f5..a37d49a6e6578cddf922f45cb8a87c6b306dae25 100644 (file)
--- a/arch/arm/mach-zynq/slcr.c
+++ b/arch/arm/mach-zynq/slcr.c
@@ -70,6 +70,18 @@ static int zynq_slcr_read(u32 *val, u32 offset)
        return 0;
 }
 
+/**
+ * zynq_slcr_unlock - Unlock SLCR registers
+ *
+ * Return:     a negative value on error, 0 on success
+ */
+static inline int zynq_slcr_unlock(void)
+{
+       zynq_slcr_write(SLCR_UNLOCK_MAGIC, SLCR_UNLOCK_OFFSET);
+
+       return 0;
+}
+
 /**
  * zynq_slcr_system_reset - Reset the entire system.
  */
@@ -82,7 +94,7 @@ void zynq_slcr_system_reset(void)
         * Note that this seems to require raw i/o
         * functions or there's a lockup?
         */
-       writel(SLCR_UNLOCK_MAGIC, zynq_slcr_base + SLCR_UNLOCK_OFFSET);
+       zynq_slcr_unlock();
 
        /*
         * Clear 0x0F000000 bits of reboot status register to workaround
@@ -166,7 +178,7 @@ int __init zynq_early_slcr_init(void)
        np->data = (__force void *)zynq_slcr_base;
 
        /* unlock the SLCR so that registers can be changed */
-       writel(SLCR_UNLOCK_MAGIC, zynq_slcr_base + SLCR_UNLOCK_OFFSET);
+       zynq_slcr_unlock();
 
        pr_info("%s mapped to %p\n", np->name, zynq_slcr_base);