stmmac: CSR clock configuration fix

When testing stmmac with my QoS reference design I checked a problem in the
CSR clock configuration that was impossibilitating the phy discovery, since
every read operation returned 0x0000ffff. This patch fixes the issue.

Signed-off-by: Joao Pinto <jpinto@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
index b21d03fe4f43ebba864ce3302eabc427e97acbb5..be3c91c7f211d94ad7386b77de73676933a46dcd 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
@@ -539,7 +539,7 @@ struct mac_device_info *dwmac1000_setup(void __iomem *ioaddr, int mcbins,
        mac->mii.reg_shift = 6;
        mac->mii.reg_mask = 0x000007C0;
        mac->mii.clk_csr_shift = 2;
-       mac->mii.clk_csr_mask = 0xF;
+       mac->mii.clk_csr_mask = GENMASK(5, 2);
 
        /* Get and dump the chip ID */
        *synopsys_id = stmmac_get_synopsys_id(hwid);

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
index a1d582f47b1ad19c07831fd9fa36ad8e358b3f0d..9dd2987e284dcb9f96fd3a48e98e606b26326d3a 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
@@ -197,7 +197,7 @@ struct mac_device_info *dwmac100_setup(void __iomem *ioaddr, int *synopsys_id)
        mac->mii.reg_shift = 6;
        mac->mii.reg_mask = 0x000007C0;
        mac->mii.clk_csr_shift = 2;
-       mac->mii.clk_csr_mask = 0xF;
+       mac->mii.clk_csr_mask = GENMASK(5, 2);
 
        /* Synopsys Id is not available on old chips */
        *synopsys_id = 0;

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
index 23322fd9e3acfba03cfc3b328322040649d27913..fda01f770eff4239cafaf12e940ee23a07ecb43f 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
@@ -81,8 +81,8 @@ static int stmmac_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg)
        value |= (phyaddr << priv->hw->mii.addr_shift)
                & priv->hw->mii.addr_mask;
        value |= (phyreg << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask;
-       value |= (priv->clk_csr & priv->hw->mii.clk_csr_mask)
-               << priv->hw->mii.clk_csr_shift;
+       value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift)
+               & priv->hw->mii.clk_csr_mask;
        if (priv->plat->has_gmac4)
                value |= MII_GMAC4_READ;
 
@@ -122,8 +122,8 @@ static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg,
                & priv->hw->mii.addr_mask;
        value |= (phyreg << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask;
 
-       value |= ((priv->clk_csr & priv->hw->mii.clk_csr_mask)
-               << priv->hw->mii.clk_csr_shift);
+       value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift)
+               & priv->hw->mii.clk_csr_mask;
        if (priv->plat->has_gmac4)
                value |= MII_GMAC4_WRITE;