}
#endif
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 15, 0)
+#define MMC_HS400_SUPPORTED
+#define MMC_DDR52_DEFINED
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 17, 0)
+#define MMC_POWER_UNDEFINED_SUPPORTED
+#endif
#endif /* __GREYBUS_KERNEL_VER_H */
(r & GB_SDIO_CAP_DRIVER_TYPE_D ? MMC_CAP_DRIVER_TYPE_D : 0);
caps2 = (r & GB_SDIO_CAP_HS200_1_2V ? MMC_CAP2_HS200_1_2V_SDR : 0) |
- (r & GB_SDIO_CAP_HS200_1_8V ? MMC_CAP2_HS200_1_8V_SDR : 0) |
+#ifdef MMC_HS400_SUPPORTED
(r & GB_SDIO_CAP_HS400_1_2V ? MMC_CAP2_HS400_1_2V : 0) |
- (r & GB_SDIO_CAP_HS400_1_8V ? MMC_CAP2_HS400_1_8V : 0);
+ (r & GB_SDIO_CAP_HS400_1_8V ? MMC_CAP2_HS400_1_8V : 0) |
+#endif
+ (r & GB_SDIO_CAP_HS200_1_8V ? MMC_CAP2_HS200_1_8V_SDR : 0);
host->mmc->caps = caps;
host->mmc->caps2 = caps2;
switch (ios->power_mode) {
case MMC_POWER_OFF:
+ default:
power_mode = GB_SDIO_POWER_OFF;
break;
case MMC_POWER_UP:
case MMC_POWER_ON:
power_mode = GB_SDIO_POWER_ON;
break;
+#ifdef MMC_POWER_UNDEFINED_SUPPORTED
case MMC_POWER_UNDEFINED:
- default:
power_mode = GB_SDIO_POWER_UNDEFINED;
break;
+#endif
}
request.power_mode = power_mode;
case MMC_TIMING_UHS_DDR50:
timing = GB_SDIO_TIMING_UHS_DDR50;
break;
+#ifdef MMC_DDR52_DEFINED
case MMC_TIMING_MMC_DDR52:
timing = GB_SDIO_TIMING_MMC_DDR52;
break;
+#endif
case MMC_TIMING_MMC_HS200:
timing = GB_SDIO_TIMING_MMC_HS200;
break;
+#ifdef MMC_HS400_SUPPORTED
case MMC_TIMING_MMC_HS400:
timing = GB_SDIO_TIMING_MMC_HS400;
break;
+#endif
}
request.timing = timing;