ARM: move L1_CACHE_SHIFT_6 to mm/Kconfig

Move L1_CACHE_SHIFT related options together, rather than spreading them
across two separate Kconfig files.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5cff165b7eb04ef092e09957cf05cf6b8eddfcee..65ea7bb57c4d2a8c0d59e2ade909949ffe34ab6a 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -178,11 +178,6 @@ config FIQ
 config ARCH_MTD_XIP
        bool
 
-config ARM_L1_CACHE_SHIFT_6
-       bool
-       help
-         Setting ARM L1 cache line size to 64 Bytes.
-
 config VECTORS_BASE
        hex
        default 0xffff0000 if MMU || CPU_HIGH_VECTOR

diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 9d30c6f804b9de6454c9dc7b8bb16974ed487a16..a51661be1412977856087a8d421dc182a2f74471 100644 (file)
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -845,6 +845,11 @@ config CACHE_XSC3L2
        help
          This option enables the L2 cache on XScale3.
 
+config ARM_L1_CACHE_SHIFT_6
+       bool
+       help
+         Setting ARM L1 cache line size to 64 Bytes.
+
 config ARM_L1_CACHE_SHIFT
        int
        default 6 if ARM_L1_CACHE_SHIFT_6