int hwmgr_set_user_specify_caps(struct pp_hwmgr *hwmgr)
{
- if (amdgpu_sclk_deep_sleep_en)
+ if (amdgpu_pp_feature_mask & PP_SCLK_DEEP_SLEEP_MASK)
phm_cap_set(hwmgr->platform_descriptor.platformCaps,
PHM_PlatformCaps_SclkDeepSleep);
else
phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
PHM_PlatformCaps_SclkDeepSleep);
- if (amdgpu_powercontainment) {
+ if (amdgpu_pp_feature_mask & PP_POWER_CONTAINMENT_MASK) {
phm_cap_set(hwmgr->platform_descriptor.platformCaps,
PHM_PlatformCaps_PowerContainment);
phm_cap_set(hwmgr->platform_descriptor.platformCaps,
struct phm_fan_speed_info;
struct pp_atomctrl_voltage_table;
-extern int amdgpu_powercontainment;
-extern int amdgpu_sclk_deep_sleep_en;
extern unsigned amdgpu_pp_feature_mask;
#define VOLTAGE_SCALE 4