coresight: ptm: Adds trace return stack option programming for PTM.
authorMike Leach <mike.leach@linaro.org>
Wed, 2 Aug 2017 16:22:02 +0000 (10:22 -0600)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 28 Aug 2017 14:05:48 +0000 (16:05 +0200)
Adds handling to program the return stack option into PTM hardware if
specified in the perf command line.

If option is not supported by the hardware then it will be ignored.
This allows capture to move between core/ETM combinations that have the
hardware support to those that do not.

Signed-off-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/hwtracing/coresight/coresight-etm.h
drivers/hwtracing/coresight/coresight-etm3x.c

index ad063d7444e1787a7c42c25f7efd798734f38bbd..70b0a248c3219ab669edb4449934a835c06d930d 100644 (file)
 #define ETMTECR1_START_STOP    BIT(25)
 /* ETMCCER - 0x1E8 */
 #define ETMCCER_TIMESTAMP      BIT(22)
+#define ETMCCER_RETSTACK       BIT(23)
 
 #define ETM_MODE_EXCLUDE       BIT(0)
 #define ETM_MODE_CYCACC                BIT(1)
index 9d8bd4e36b32f7fa3231538cc3937b3c16febb41..9c010eb9497f26e258f488f7192a7fb18ff6a960 100644 (file)
@@ -310,7 +310,9 @@ void etm_config_trace_mode(struct etm_config *config)
        config->addr_type[1] = ETM_ADDR_TYPE_RANGE;
 }
 
-#define ETM3X_SUPPORTED_OPTIONS (ETMCR_CYC_ACC | ETMCR_TIMESTAMP_EN)
+#define ETM3X_SUPPORTED_OPTIONS (ETMCR_CYC_ACC | \
+                                ETMCR_TIMESTAMP_EN | \
+                                ETMCR_RETURN_STACK)
 
 static int etm_parse_event_config(struct etm_drvdata *drvdata,
                                  struct perf_event *event)
@@ -341,14 +343,24 @@ static int etm_parse_event_config(struct etm_drvdata *drvdata,
                etm_config_trace_mode(config);
 
        /*
-        * At this time only cycle accurate and timestamp options are
-        * available.
+        * At this time only cycle accurate, return stack  and timestamp
+        * options are available.
         */
        if (attr->config & ~ETM3X_SUPPORTED_OPTIONS)
                return -EINVAL;
 
        config->ctrl = attr->config;
 
+       /*
+        * Possible to have cores with PTM (supports ret stack) and ETM
+        * (never has ret stack) on the same SoC. So if we have a request
+        * for return stack that can't be honoured on this core then
+        * clear the bit - trace will still continue normally
+        */
+       if ((config->ctrl & ETMCR_RETURN_STACK) &&
+           !(drvdata->etmccer & ETMCCER_RETSTACK))
+               config->ctrl &= ~ETMCR_RETURN_STACK;
+
        return 0;
 }